gpio: Remove non-ternary tristate mode, make ternaries easier

The function to read board IDs from tristate GPIOs currently supports
two output modes: a normal base-3 integer, or a custom format where
every two bits represent one tristate pin. Each board decides which
representation to use on its own, which is inconsistent and provides
another possible gotcha to trip over when reading unfamiliar code.

The two-bits-per-pin format creates the additional problem that a
complete list of IDs (such as some boards use to build board-ID tables)
necessarily has "holes" in them (since 0b11 does not correspond to a
possible pin state), which makes them extremely tricky to write, read
and expand. It's also very unintuitive in my opinion, although it was
intended to make it easier to read individual pin states from a hex
representation.

This patch switches all boards over to base-3 and removes the other
format to improve consistency. The tristate reading function will just
print the pin states as they are read to make it easier to debug them,
and we add a new BASE3() macro that can generate ternary numbers from
pin states. Also change the order of all static initializers of board ID
pin lists to write the most significant bit first, hoping that this can
help clear up confusion about the endianness of the pins.

CQ-DEPEND=CL:219902
BUG=None
TEST=Booted on a Nyan_Blaze (with board ID 1, unfortunately the only one
I have). Compiled on Daisy, Peach_Pit, Nyan, Nyan_Big, Nyan_Blaze, Rush,
Rush_Ryu, Storm, Veryon_Pinky and Falco for good measure.

Change-Id: I3ce5a0829f260db7d7df77e6788c2c6d13901b8f
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 2fa9545ac431c9af111ee4444d593ee4cf49554d
Original-Change-Id: I6133cdaf01ed6590ae07e88d9e85a33dc013211a
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/219901
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/9401
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>

2 files changed, 53 insertions, 9 deletions

diff --git a/src/include/base3.h b/src/include/base3.h
new file mode 100644
index 0000000000..e92cc8bae7
--- /dev/null
+++ b/src/include/base3.h
@@ -0,0 +1,48 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2014 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#ifndef __SRC_INCLUDE_BASE3_H__
+#define __SRC_INCLUDE_BASE3_H__
+
+/* We translate a floating pin (Z) as the ternary digit 2. */
+#define Z 2
+
+/*
+ * This provides a variadic macro BASE3() that can be used to translate a set of
+ * pin states into its base-3 integer representation, even in the context of a
+ * static initializer. You can call it with any number of up to 6 arguments,
+ * e.g. BASE3(1, Z) -> 5 or BASE3(0, Z, 1, 0) -> 21. Just don't look too closely
+ * at how the sausage is made. (Pay extra attention to typos when expanding it!)
+ */
+#define _BASE3_IMPL_1(arg0, arg1, arg2, arg3, arg4, arg5) arg0
+#define _BASE3_IMPL_2(arg0, arg1, arg2, arg3, arg4, arg5) \
+	(arg1 + (3 * _BASE3_IMPL_1(arg0, arg1, arg2, arg3, arg4, arg5)))
+#define _BASE3_IMPL_3(arg0, arg1, arg2, arg3, arg4, arg5) \
+	(arg2 + (3 * _BASE3_IMPL_2(arg0, arg1, arg2, arg3, arg4, arg5)))
+#define _BASE3_IMPL_4(arg0, arg1, arg2, arg3, arg4, arg5) \
+	(arg3 + (3 * _BASE3_IMPL_3(arg0, arg1, arg2, arg3, arg4, arg5)))
+#define _BASE3_IMPL_5(arg0, arg1, arg2, arg3, arg4, arg5) \
+	(arg4 + (3 * _BASE3_IMPL_4(arg0, arg1, arg2, arg3, arg4, arg5)))
+#define _BASE3_IMPL_6(arg0, arg1, arg2, arg3, arg4, arg5) \
+	(arg5 + (3 * _BASE3_IMPL_5(arg0, arg1, arg2, arg3, arg4, arg5)))
+#define _BASE3_IMPL(arg0, arg1, arg2, arg3, arg4, arg5, NARGS, ...) \
+	_BASE3_IMPL##NARGS(arg0, arg1, arg2, arg3, arg4, arg5)
+#define BASE3(...) _BASE3_IMPL(__VA_ARGS__, _6, _5, _4, _3, _2, _1)
+
+#endif /* __SRC_INCLUDE_BASE3_H__ */
diff --git a/src/include/gpio.h b/src/include/gpio.h
index af06697050..b2a341dabc 100644
--- a/src/include/gpio.h
+++ b/src/include/gpio.h
@@ -36,17 +36,13 @@ void gpio_output(gpio_t gpio, int value);
 
 /*
  * Read the value presented by the set of GPIOs, when each pin is interpreted
- * as a number in 0..2 range depending on the external pullup situation.
+ * as a base-3 digit (LOW = 0, HIGH = 1, Z/floating = 2).
+ * Example: X1 = Z, X2 = 1 -> gpio_get_tristates({GPIO(X1), GPIO(X2)}) = 5
+ * BASE3() from <base3.h> can generate numbers to compare the result to.
  *
- * Depending on the third parameter, the return value is either a set of two
- * bit fields, each representing one GPIO value, or a number where each GPIO is
- * included multiplied by 3^gpio_num, resulting in a true tertiary value.
- *
- * gpio[]: pin positions to read. little-endian (less significant value first).
+ * gpio[]: pin positions to read. gpio[0] is less significant than gpio[1].
  * num_gpio: number of pins to read.
- * tertiary: 1: pins are interpreted as a quad coded tertiary.
- *           0: pins are interpreted as a set of two bit fields.
  */
-int gpio_get_tristates(gpio_t gpio[], int num_gpio, int tertiary);
+int gpio_get_tristates(gpio_t gpio[], int num_gpio);
 
 #endif /* __SRC_INCLUDE_GPIO_H__ */