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authorAntonello Dettori <dev@dettori.io>2016-08-30 22:18:06 +0200
committerMartin Roth <martinroth@google.com>2016-09-04 05:49:15 +0200
commit45b3b82f186bc9efd28d4143bad53b5ea3564226 (patch)
tree38975e993f8bbae63c949ea40599e7f7b9e42471 /src/include
parent6fc430b3ebb6173fba09b04f3a32cf8ae2be48c6 (diff)
device/pci.h: change #ifdef argument to __SIMPLE_DEVICE__
Change the argument to #ifdef from __PRE_RAM__ to __SIMPLE_DEVICE__ in order to account for the coreboot stages that do not define device_t and are not __PRE_RAM__ (i.e. smm) device_t Change-Id: Ic6e9b504803622b60b5217c9432ce57caefc5065 Signed-off-by: Antonello Dettori <dev@dettori.io> Reviewed-on: https://review.coreboot.org/16369 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/include')
-rw-r--r--src/include/device/pci.h6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/include/device/pci.h b/src/include/device/pci.h
index 9ef36148bb..e167752e92 100644
--- a/src/include/device/pci.h
+++ b/src/include/device/pci.h
@@ -108,13 +108,13 @@ static inline const struct pci_operations *ops_pci(device_t dev)
#endif /* ! __SIMPLE_DEVICE__ */
-#ifdef __PRE_RAM__
+#ifdef __SIMPLE_DEVICE__
unsigned pci_find_next_capability(pci_devfn_t dev, unsigned cap, unsigned last);
unsigned pci_find_capability(pci_devfn_t dev, unsigned cap);
-#else /* !__PRE_RAM__ */
+#else /* !__SIMPLE_DEVICE__ */
unsigned pci_find_next_capability(device_t dev, unsigned cap, unsigned last);
unsigned pci_find_capability(device_t dev, unsigned cap);
-#endif /* __PRE_RAM__ */
+#endif /* __SIMPLE_DEVICE__ */
void pci_early_bridge_init(void);
int pci_early_device_probe(u8 bus, u8 dev, u32 mmio_base);