diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2022-10-07 00:36:00 +0200 |
|---|---|---|
| committer | Lean Sheng Tan <sheng.tan@9elements.com> | 2023-02-09 21:40:52 +0000 |
| commit | 434d7d45829ed9da41b17fe56fe7affca001be21 (patch) | |
| tree | eace33bde0f5cda1c07272899bad213c9201881b /src/include | |
| parent | 05df1084edecdd7a0e9560371debacfe70ab3896 (diff) | |
sb/intel/lynxpoint: Add PCI DIDs for 9 series PCHs
The desktop 9 series PCHs should be the same as the 8 series PCHs.
Change-Id: Iee93fee4f28b88a72c537944159fb7cbb2796235
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68187
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Diffstat (limited to 'src/include')
| -rw-r--r-- | src/include/device/pci_ids.h | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index dbc17062fe..cc1ba20611 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -2835,6 +2835,11 @@ #define PCI_DID_INTEL_LPT_C224 0x8c54 #define PCI_DID_INTEL_LPT_C226 0x8c56 #define PCI_DID_INTEL_LPT_H81 0x8c5c +#define PCI_DID_INTEL_LPT_MOBILE_SAMPLE_9 0x8cc1 +#define PCI_DID_INTEL_LPT_DESKTOP_SAMPLE_9 0x8cc2 +#define PCI_DID_INTEL_LPT_HM97 0x8cc3 +#define PCI_DID_INTEL_LPT_Z97 0x8cc4 +#define PCI_DID_INTEL_LPT_H97 0x8cc6 #define PCI_DID_INTEL_LPT_LP_SAMPLE 0x9c41 #define PCI_DID_INTEL_LPT_LP_PREMIUM 0x9c43 #define PCI_DID_INTEL_LPT_LP_MAINSTREAM 0x9c45 @@ -3475,6 +3480,18 @@ #define PCI_DID_INTEL_LPT_H_MOBILE_SATA_RAID_PREM 0x8c07 #define PCI_DID_INTEL_LPT_H_MOBILE_SATA_IDE_P45 0x8c09 #define PCI_DID_INTEL_LPT_H_MOBILE_SATA_RAID_2 0x8c0f +#define PCI_DID_INTEL_LPT_H_DESKTOP_SATA_IDE_9 0x8c80 +#define PCI_DID_INTEL_LPT_H_DESKTOP_SATA_AHCI_9 0x8c82 +#define PCI_DID_INTEL_LPT_H_DESKTOP_SATA_RAID_1_9 0x8c84 +#define PCI_DID_INTEL_LPT_H_DESKTOP_SATA_RAID_PREM_9 0x8c86 +#define PCI_DID_INTEL_LPT_H_DESKTOP_SATA_IDE_P45_9 0x8c88 +#define PCI_DID_INTEL_LPT_H_DESKTOP_SATA_RAID_2_9 0x8c0e +#define PCI_DID_INTEL_LPT_H_MOBILE_SATA_IDE_9 0x8c81 +#define PCI_DID_INTEL_LPT_H_MOBILE_SATA_AHCI_9 0x8c83 +#define PCI_DID_INTEL_LPT_H_MOBILE_SATA_RAID_1_9 0x8c85 +#define PCI_DID_INTEL_LPT_H_MOBILE_SATA_RAID_PREM_9 0x8c87 +#define PCI_DID_INTEL_LPT_H_MOBILE_SATA_IDE_P45_9 0x8c89 +#define PCI_DID_INTEL_LPT_H_MOBILE_SATA_RAID_2_9 0x8c8f #define PCI_DID_INTEL_LPT_LP_SATA_AHCI 0x9c03 #define PCI_DID_INTEL_LPT_LP_SATA_RAID_1 0x9c05 #define PCI_DID_INTEL_LPT_LP_SATA_RAID_PREM 0x9c07 @@ -4114,6 +4131,7 @@ /* Intel SMBUS device Ids */ #define PCI_DID_INTEL_LPT_H_SMBUS 0x8c22 +#define PCI_DID_INTEL_LPT_H_SMBUS_9 0x8ca2 #define PCI_DID_INTEL_LPT_LP_SMBUS 0x9c22 #define PCI_DID_INTEL_WPT_LP_SMBUS 0x9ca2 #define PCI_DID_INTEL_APL_SMBUS 0x5ad4 @@ -4141,10 +4159,13 @@ /* Intel EHCI device IDs */ #define PCI_DID_INTEL_LPT_H_EHCI_1 0x8c26 #define PCI_DID_INTEL_LPT_H_EHCI_2 0x8c2d +#define PCI_DID_INTEL_LPT_H_EHCI_1_9 0x8ca6 +#define PCI_DID_INTEL_LPT_H_EHCI_2_9 0x8cad #define PCI_DID_INTEL_LPT_LP_EHCI 0x9c26 /* Intel XHCI device Ids */ #define PCI_DID_INTEL_LPT_H_XHCI 0x8c31 +#define PCI_DID_INTEL_LPT_H_XHCI_9 0x8cb1 #define PCI_DID_INTEL_LPT_LP_XHCI 0x9c31 #define PCI_DID_INTEL_APL_XHCI 0x5aa8 #define PCI_DID_INTEL_GLK_XHCI 0x31a8 @@ -4215,6 +4236,7 @@ /* Intel AUDIO device Ids */ #define PCI_DID_INTEL_LPT_H_AUDIO 0x8c20 +#define PCI_DID_INTEL_LPT_H_AUDIO_9 0x8ca0 #define PCI_DID_INTEL_LPT_LP_AUDIO 0x9c20 #define PCI_DID_INTEL_APL_AUDIO 0x5a98 #define PCI_DID_INTEL_GLK_AUDIO 0x3198 @@ -4262,6 +4284,7 @@ /* Intel HECI/ME device Ids */ #define PCI_DID_INTEL_LPT_H_MEI 0x8c3a +#define PCI_DID_INTEL_LPT_H_MEI_9 0x8cba #define PCI_DID_INTEL_LPT_LP_MEI 0x9c3a #define PCI_DID_INTEL_APL_CSE0 0x5a9a #define PCI_DID_INTEL_GLK_CSE0 0x319a |