diff options
| author | Naresh Solanki <Naresh.Solanki@9elements.com> | 2022-12-05 11:42:10 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-03-23 21:21:09 +0000 |
| commit | 08135332ddf5ad60d922f3bc6742e719d3ceebdd (patch) | |
| tree | e143117c95a3e2c99cfeae82a4babc75176af1ac /src/include | |
| parent | 518bba8409b704864b28d58baebcd4899650a3d3 (diff) | |
soc/intel/xeon_sp: Report platform cpu info
Add platform cpu info for known microcode, print cpuid & processor
branding string. This will print as in the following example:
CPU: Intel(R) Xeon(R) Platinum 8468H
CPU: ID 806f6, Sapphire Rapids E3, ucode: 2b000130
CPU: AES supported, TXT supported, VT supported
Change-Id: I9c08fb924aad81608f554523432ab6a549b1b75f
Signed-off-by: Naresh Solanki <Naresh.Solanki@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73391
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/include')
| -rw-r--r-- | src/include/cpu/intel/cpu_ids.h | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/src/include/cpu/intel/cpu_ids.h b/src/include/cpu/intel/cpu_ids.h index 863dc8b3a5..ff1525200b 100644 --- a/src/include/cpu/intel/cpu_ids.h +++ b/src/include/cpu/intel/cpu_ids.h @@ -53,6 +53,15 @@ #define CPUID_TIGERLAKE_A0 0x806c0 #define CPUID_TIGERLAKE_B0 0x806c1 #define CPUID_TIGERLAKE_R0 0x806d1 +#define CPUID_SAPPHIRERAPIDS_SP_A 0x806f0 +#define CPUID_SAPPHIRERAPIDS_SP_B 0x806f1 +#define CPUID_SAPPHIRERAPIDS_SP_C 0x806f2 +#define CPUID_SAPPHIRERAPIDS_SP_D 0x806f3 +#define CPUID_SAPPHIRERAPIDS_SP_E0 0x806f4 +#define CPUID_SAPPHIRERAPIDS_SP_E2 0x806f5 +#define CPUID_SAPPHIRERAPIDS_SP_E3 0x806f6 +#define CPUID_SAPPHIRERAPIDS_SP_E4 0x806f7 +#define CPUID_SAPPHIRERAPIDS_SP_Ex 0x806f8 #define CPUID_ELKHARTLAKE_A0 0x90660 #define CPUID_ELKHARTLAKE_B0 0x90661 #define CPUID_ALDERLAKE_S_A0 0x90670 |