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authorTim Chu <Tim.Chu@quantatw.com>2023-01-16 07:01:37 +0000
committerFelix Held <felix-coreboot@felixheld.de>2023-02-06 12:40:53 +0000
commit0602936c0bb8f5fdacb644d7bee3641b8170f6c4 (patch)
tree4f0150ddd38a8cd364181b75bad6d3f791355e17 /src/include
parent4044e859388fcdb05436138911fad1ada6cf2d32 (diff)
inc/device: Add extended capability ID for ATS
Add extended capability ID for Address Translation Services. This definition can be found in PCI Express Base Specification rev6.0 9.3.7. Signed-off-by: Tim Chu <Tim.Chu@quantatw.com> Change-Id: I777070ea223fc7e83c510c8eadbe4e028825eef6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/71929 Reviewed-by: David Hendricks <david.hendricks@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/include')
-rw-r--r--src/include/device/pci_def.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/include/device/pci_def.h b/src/include/device/pci_def.h
index ef23b94e65..c13e054616 100644
--- a/src/include/device/pci_def.h
+++ b/src/include/device/pci_def.h
@@ -468,6 +468,7 @@
/* Extended Capability lists*/
#define PCIE_EXT_CAP_OFFSET 0x100
#define PCIE_EXT_CAP_AER_ID 0x0001
+#define PCIE_EXT_CAP_ID_ATS 0x000F
#define PCIE_EXT_CAP_L1SS_ID 0x001E
#define PCIE_EXT_CAP_LTR_ID 0x0018
#define PCIE_EXT_CAP_RESIZABLE_BAR 0x0015