diff options
| author | Varshit Pandya <varshit.b.pandya@intel.com> | 2021-01-17 18:39:29 +0530 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-01-22 14:26:38 +0000 |
| commit | f4d98fdd20bbe3981684d32d3d3b257ab81163bb (patch) | |
| tree | 6d055b3f1cc54ab467e3deff6a1c43527fffdbc7 /src/include | |
| parent | f2d38baa983ad168466c5a5ac960da48ebaf34e2 (diff) | |
soc/intel/commmon: Include Alder Lake device IDs
Add Alder Lake M specific CPU, System AGent, PCH (Alder Point aka
ADP),
IGD device IDs.
Document Number: 619501, 626817
Signed-off-by: Varshit Pandya <varshit.b.pandya@intel.com>
Change-Id: Ib13fe229f9e65eae8967aa20e28e29ac5c319265
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49629
Reviewed-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/include')
| -rw-r--r-- | src/include/device/pci_ids.h | 83 |
1 files changed, 82 insertions, 1 deletions
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index 0b78c9f9e9..45f3092243 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -2992,6 +2992,38 @@ #define PCI_DEVICE_ID_INTEL_ADP_S_ESPI_29 0x7a9d #define PCI_DEVICE_ID_INTEL_ADP_S_ESPI_30 0x7a9e #define PCI_DEVICE_ID_INTEL_ADP_S_ESPI_31 0x7a9f +#define PCI_DEVICE_ID_INTEL_ADP_M_ESPI_0 0x5480 +#define PCI_DEVICE_ID_INTEL_ADP_M_ESPI_1 0x5481 +#define PCI_DEVICE_ID_INTEL_ADP_M_ESPI_2 0x5482 +#define PCI_DEVICE_ID_INTEL_ADP_M_ESPI_3 0x5483 +#define PCI_DEVICE_ID_INTEL_ADP_M_ESPI_4 0x5484 +#define PCI_DEVICE_ID_INTEL_ADP_M_ESPI_5 0x5485 +#define PCI_DEVICE_ID_INTEL_ADP_M_ESPI_6 0x5486 +#define PCI_DEVICE_ID_INTEL_ADP_M_ESPI_7 0x5487 +#define PCI_DEVICE_ID_INTEL_ADP_M_ESPI_8 0x5488 +#define PCI_DEVICE_ID_INTEL_ADP_M_ESPI_9 0x5489 +#define PCI_DEVICE_ID_INTEL_ADP_M_ESPI_10 0x548a +#define PCI_DEVICE_ID_INTEL_ADP_M_ESPI_11 0x548b +#define PCI_DEVICE_ID_INTEL_ADP_M_ESPI_12 0x548c +#define PCI_DEVICE_ID_INTEL_ADP_M_ESPI_13 0x548d +#define PCI_DEVICE_ID_INTEL_ADP_M_ESPI_14 0x548e +#define PCI_DEVICE_ID_INTEL_ADP_M_ESPI_15 0x548f +#define PCI_DEVICE_ID_INTEL_ADP_M_ESPI_16 0x5490 +#define PCI_DEVICE_ID_INTEL_ADP_M_ESPI_17 0x5491 +#define PCI_DEVICE_ID_INTEL_ADP_M_ESPI_18 0x5482 +#define PCI_DEVICE_ID_INTEL_ADP_M_ESPI_19 0x5493 +#define PCI_DEVICE_ID_INTEL_ADP_M_ESPI_20 0x5494 +#define PCI_DEVICE_ID_INTEL_ADP_M_ESPI_21 0x5495 +#define PCI_DEVICE_ID_INTEL_ADP_M_ESPI_22 0x5496 +#define PCI_DEVICE_ID_INTEL_ADP_M_ESPI_23 0x5497 +#define PCI_DEVICE_ID_INTEL_ADP_M_ESPI_24 0x5498 +#define PCI_DEVICE_ID_INTEL_ADP_M_ESPI_25 0x5499 +#define PCI_DEVICE_ID_INTEL_ADP_M_ESPI_26 0x549a +#define PCI_DEVICE_ID_INTEL_ADP_M_ESPI_27 0x549b +#define PCI_DEVICE_ID_INTEL_ADP_M_ESPI_28 0x548c +#define PCI_DEVICE_ID_INTEL_ADP_M_ESPI_29 0x549d +#define PCI_DEVICE_ID_INTEL_ADP_M_ESPI_30 0x549e +#define PCI_DEVICE_ID_INTEL_ADP_M_ESPI_31 0x549f /* Intel PCIE device ids */ #define PCI_DEVICE_ID_INTEL_LPT_H_PCIE_RP1 0x8c10 @@ -3287,6 +3319,17 @@ #define PCI_DEVICE_ID_INTEL_ADP_S_PCIE_RP27 0x7aca #define PCI_DEVICE_ID_INTEL_ADP_S_PCIE_RP28 0x7acb +#define PCI_DEVICE_ID_INTEL_ADP_M_PCIE_RP1 0x54b8 +#define PCI_DEVICE_ID_INTEL_ADP_M_PCIE_RP2 0x54b9 +#define PCI_DEVICE_ID_INTEL_ADP_M_PCIE_RP3 0x54ba +#define PCI_DEVICE_ID_INTEL_ADP_M_PCIE_RP4 0x54bb +#define PCI_DEVICE_ID_INTEL_ADP_M_PCIE_RP5 0x54bc +#define PCI_DEVICE_ID_INTEL_ADP_M_PCIE_RP6 0x54bd +#define PCI_DEVICE_ID_INTEL_ADP_M_PCIE_RP7 0x54be +#define PCI_DEVICE_ID_INTEL_ADP_M_PCIE_RP8 0x54bf +#define PCI_DEVICE_ID_INTEL_ADP_M_PCIE_RP9 0x54b0 +#define PCI_DEVICE_ID_INTEL_ADP_M_PCIE_RP10 0x54b1 + /* Intel SATA device Ids */ #define PCI_DEVICE_ID_INTEL_LPT_H_DESKTOP_SATA_IDE 0x8c00 #define PCI_DEVICE_ID_INTEL_LPT_H_DESKTOP_SATA_AHCI 0x8c02 @@ -3353,6 +3396,9 @@ #define PCI_DEVICE_ID_INTEL_ADP_S_SATA_4 0x7ae5 #define PCI_DEVICE_ID_INTEL_ADP_S_SATA_5 0x7ae6 #define PCI_DEVICE_ID_INTEL_ADP_S_SATA_6 0x7ae7 +#define PCI_DEVICE_ID_INTEL_ADP_M_SATA_1 0x54d3 +#define PCI_DEVICE_ID_INTEL_ADP_M_SATA_2 0x54d7 +#define PCI_DEVICE_ID_INTEL_ADP_M_SATA_3 0x282a /* Intel PMC device Ids */ #define PCI_DEVICE_ID_INTEL_SPT_LP_PMC 0x9d21 @@ -3372,6 +3418,7 @@ #define PCI_DEVICE_ID_INTEL_JSP_PMC 0x4da1 #define PCI_DEVICE_ID_INTEL_ADP_P_PMC 0x7a21 #define PCI_DEVICE_ID_INTEL_ADP_S_PMC 0x7aa1 +#define PCI_DEVICE_ID_INTEL_ADP_M_PMC 0x54a1 /* Intel I2C device Ids */ #define PCI_DEVICE_ID_INTEL_LPT_LP_I2C0 0x9c61 @@ -3466,6 +3513,13 @@ #define PCI_DEVICE_ID_INTEL_ADP_S_I2C4 0x7afc #define PCI_DEVICE_ID_INTEL_ADP_S_I2C5 0x7afd +#define PCI_DEVICE_ID_INTEL_ADP_M_I2C0 0x54e8 +#define PCI_DEVICE_ID_INTEL_ADP_M_I2C1 0x54e9 +#define PCI_DEVICE_ID_INTEL_ADP_M_I2C2 0x54ea +#define PCI_DEVICE_ID_INTEL_ADP_M_I2C3 0x54eb +#define PCI_DEVICE_ID_INTEL_ADP_M_I2C4 0x54c5 +#define PCI_DEVICE_ID_INTEL_ADP_M_I2C5 0x54c6 + /* Intel UART device Ids */ #define PCI_DEVICE_ID_INTEL_LPT_LP_UART0 0x9c63 #define PCI_DEVICE_ID_INTEL_LPT_LP_UART1 0x9c64 @@ -3527,6 +3581,11 @@ #define PCI_DEVICE_ID_INTEL_ADP_S_UART5 0x7ade #define PCI_DEVICE_ID_INTEL_ADP_S_UART6 0x7adf +#define PCI_DEVICE_ID_INTEL_ADP_M_UART0 0x54a8 +#define PCI_DEVICE_ID_INTEL_ADP_M_UART1 0x54a9 +#define PCI_DEVICE_ID_INTEL_ADP_M_UART2 0x54c7 +#define PCI_DEVICE_ID_INTEL_ADP_M_UART3 0x54da + /* Intel SPI device Ids */ #define PCI_DEVICE_ID_INTEL_LPT_LP_GSPI0 0x9c65 #define PCI_DEVICE_ID_INTEL_LPT_LP_GSPI1 0x9c66 @@ -3536,7 +3595,7 @@ #define PCI_DEVICE_ID_INTEL_APL_SPI0 0x5ac2 #define PCI_DEVICE_ID_INTEL_APL_SPI1 0x5ac4 #define PCI_DEVICE_ID_INTEL_APL_SPI2 0x5ac6 -#define PCI_DEVICE_ID_INTEL_APL_HWSEQ_SPI 0x5a96 +#define PCI_DEVICE_ID_INTEL_APL_HWSEQ_SPI 0x5a96 #define PCI_DEVICE_ID_INTEL_GLK_SPI0 0x31c2 #define PCI_DEVICE_ID_INTEL_GLK_SPI1 0x31c4 #define PCI_DEVICE_ID_INTEL_GLK_SPI2 0x31c6 @@ -3597,6 +3656,11 @@ #define PCI_DEVICE_ID_INTEL_ADP_S_SPI5 0x7aee #define PCI_DEVICE_ID_INTEL_ADP_S_SPI6 0x7aef +#define PCI_DEVICE_ID_INTEL_ADP_M_HWSEQ_SPI 0x54a4 +#define PCI_DEVICE_ID_INTEL_ADP_M_SPI0 0x54aa +#define PCI_DEVICE_ID_INTEL_ADP_M_SPI1 0x54ab +#define PCI_DEVICE_ID_INTEL_ADP_M_SPI2 0x54fb + /* Intel IGD device Ids */ #define PCI_DEVICE_ID_INTEL_SKL_GT1F_DT2 0x1902 #define PCI_DEVICE_ID_INTEL_SKL_GT1_SULTM 0x1906 @@ -3846,6 +3910,7 @@ #define PCI_DEVICE_ID_INTEL_JSP_SMBUS 0x4da3 #define PCI_DEVICE_ID_INTEL_ADP_P_SMBUS 0xa0a3 #define PCI_DEVICE_ID_INTEL_ADP_S_SMBUS 0x7aa3 +#define PCI_DEVICE_ID_INTEL_ADP_M_SMBUS 0x54a3 /* Intel EHCI device IDs */ #define PCI_DEVICE_ID_INTEL_LPT_H_EHCI_1 0x8c26 @@ -3874,6 +3939,7 @@ #define PCI_DEVICE_ID_INTEL_ADP_P_XHCI 0x51ed #define PCI_DEVICE_ID_INTEL_ADP_S_XHCI 0x7ae0 #define PCI_DEVICE_ID_INTEL_ADP_TCSS_XHCI 0x461e +#define PCI_DEVICE_ID_INTEL_ADP_M_XHCI 0x54ed /* Intel P2SB device Ids */ #define PCI_DEVICE_ID_INTEL_APL_P2SB 0x5a92 @@ -3893,6 +3959,7 @@ #define PCI_DEVICE_ID_INTEL_JSP_P2SB 0x4da0 #define PCI_DEVICE_ID_INTEL_ADP_P_P2SB 0x7a20 #define PCI_DEVICE_ID_INTEL_ADP_S_P2SB 0x7aa0 +#define PCI_DEVICE_ID_INTEL_ADP_M_P2SB 0x54a0 /* Intel SRAM device Ids */ #define PCI_DEVICE_ID_INTEL_APL_SRAM 0x5aec @@ -3907,6 +3974,7 @@ #define PCI_DEVICE_ID_INTEL_JSP_SRAM 0x4def #define PCI_DEVICE_ID_INTEL_ADP_P_SRAM 0x7a6f #define PCI_DEVICE_ID_INTEL_ADP_S_SRAM 0x7aa7 +#define PCI_DEVICE_ID_INTEL_ADP_M_SRAM 0x54ef /* Intel AUDIO device Ids */ #define PCI_DEVICE_ID_INTEL_LPT_H_AUDIO 0x8c20 @@ -3937,6 +4005,14 @@ #define PCI_DEVICE_ID_INTEL_ADP_S_AUDIO_8 0x7ad7 #define PCI_DEVICE_ID_INTEL_ADP_P_AUDIO 0x51c8 +#define PCI_DEVICE_ID_INTEL_ADP_M_AUDIO_1 0x54c8 +#define PCI_DEVICE_ID_INTEL_ADP_M_AUDIO_2 0x54c9 +#define PCI_DEVICE_ID_INTEL_ADP_M_AUDIO_3 0x54ca +#define PCI_DEVICE_ID_INTEL_ADP_M_AUDIO_4 0x54cb +#define PCI_DEVICE_ID_INTEL_ADP_M_AUDIO_5 0x54cc +#define PCI_DEVICE_ID_INTEL_ADP_M_AUDIO_6 0x54cd +#define PCI_DEVICE_ID_INTEL_ADP_M_AUDIO_7 0x54ce + /* Intel HECI/ME device Ids */ #define PCI_DEVICE_ID_INTEL_LPT_H_MEI 0x8c3a #define PCI_DEVICE_ID_INTEL_LPT_LP_MEI 0x9c3a @@ -3971,6 +4047,10 @@ #define PCI_DEVICE_ID_INTEL_ADP_S_CSE1 0x7ae9 #define PCI_DEVICE_ID_INTEL_ADP_S_CSE2 0x7aec #define PCI_DEVICE_ID_INTEL_ADP_S_CSE3 0x7aed +#define PCI_DEVICE_ID_INTEL_ADP_M_CSE0 0x54e0 +#define PCI_DEVICE_ID_INTEL_ADP_M_CSE1 0x54e1 +#define PCI_DEVICE_ID_INTEL_ADP_M_CSE2 0x54e4 +#define PCI_DEVICE_ID_INTEL_ADP_M_CSE3 0x54e5 /* Intel XDCI device Ids */ #define PCI_DEVICE_ID_INTEL_APL_XDCI 0x5aaa @@ -3988,6 +4068,7 @@ #define PCI_DEVICE_ID_INTEL_ADP_P_XDCI 0x51ee #define PCI_DEVICE_ID_INTEL_ADP_S_XDCI 0x7ae1 #define PCI_DEVICE_ID_INTEL_ADP_TCSS_XDCI 0x460e +#define PCI_DEVICE_ID_INTEL_ADP_M_XDCI 0x54ee /* Intel SD device Ids */ #define PCI_DEVICE_ID_INTEL_LPT_LP_SD 0x9c35 |