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authorKyösti Mälkki <kyosti.malkki@gmail.com>2017-03-02 13:01:58 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2017-03-07 00:43:20 +0100
commita405a5860d2765911fe7655e81c78e3b563bacab (patch)
treecb022deb343d2ed0942b1137ea427fd39b0c66cb /src/include
parent6cbd3980aba050352b09c818ffabe822411c1901 (diff)
Stage rules.h: Add ENV_LIBAGESA
Definition is required to enable use of printk() from AGESA proper. Change-Id: I6666a003c91794490f670802d496321ffb965cd3 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/18544 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/include')
-rw-r--r--src/include/rules.h23
1 files changed, 20 insertions, 3 deletions
diff --git a/src/include/rules.h b/src/include/rules.h
index a6328049ed..0f212318a6 100644
--- a/src/include/rules.h
+++ b/src/include/rules.h
@@ -27,6 +27,7 @@
#define ENV_VERSTAGE 0
#define ENV_RMODULE 0
#define ENV_POSTCAR 0
+#define ENV_LIBAGESA 0
#define ENV_STRING "bootblock"
#elif defined(__ROMSTAGE__)
@@ -37,6 +38,7 @@
#define ENV_VERSTAGE 0
#define ENV_RMODULE 0
#define ENV_POSTCAR 0
+#define ENV_LIBAGESA 0
#define ENV_STRING "romstage"
#elif defined(__SMM__)
@@ -47,6 +49,7 @@
#define ENV_VERSTAGE 0
#define ENV_RMODULE 0
#define ENV_POSTCAR 0
+#define ENV_LIBAGESA 0
#define ENV_STRING "smm"
#elif defined(__VERSTAGE__)
@@ -57,6 +60,7 @@
#define ENV_VERSTAGE 1
#define ENV_RMODULE 0
#define ENV_POSTCAR 0
+#define ENV_LIBAGESA 0
#define ENV_STRING "verstage"
#elif defined(__RAMSTAGE__)
@@ -67,6 +71,7 @@
#define ENV_VERSTAGE 0
#define ENV_RMODULE 0
#define ENV_POSTCAR 0
+#define ENV_LIBAGESA 0
#define ENV_STRING "ramstage"
#elif defined(__RMODULE__)
@@ -77,6 +82,7 @@
#define ENV_VERSTAGE 0
#define ENV_RMODULE 1
#define ENV_POSTCAR 0
+#define ENV_LIBAGESA 0
#define ENV_STRING "rmodule"
#elif defined(__POSTCAR__)
@@ -87,14 +93,24 @@
#define ENV_VERSTAGE 0
#define ENV_RMODULE 0
#define ENV_POSTCAR 1
+#define ENV_LIBAGESA 0
#define ENV_STRING "postcar"
+#elif defined(__LIBAGESA__)
+#define ENV_BOOTBLOCK 0
+#define ENV_ROMSTAGE 0
+#define ENV_RAMSTAGE 0
+#define ENV_SMM 0
+#define ENV_VERSTAGE 0
+#define ENV_RMODULE 0
+#define ENV_POSTCAR 0
+#define ENV_LIBAGESA 1
+#define ENV_STRING "libagesa"
+
#else
/*
* Default case of nothing set for random blob generation using
- * create_class_compiler that isn't bound to a stage. Also AGESA
- * apparently builds things compeletely separate from coreboot's
- * build infrastructure -- hardcoding its own rules.
+ * create_class_compiler that isn't bound to a stage.
*/
#define ENV_BOOTBLOCK 0
#define ENV_ROMSTAGE 0
@@ -103,6 +119,7 @@
#define ENV_VERSTAGE 0
#define ENV_RMODULE 0
#define ENV_POSTCAR 0
+#define ENV_LIBAGESA 0
#define ENV_STRING "UNKNOWN"
#endif