summaryrefslogtreecommitdiff
path: root/src/include/wrdd.h
diff options
context:
space:
mode:
authorNitheesh Sekar <nsekar@codeaurora.org>2018-09-14 18:50:38 +0530
committerPatrick Georgi <pgeorgi@google.com>2019-03-18 18:18:00 +0000
commit6bee0cee20fad2a3c68a9c54694807d9f2f48b0c (patch)
tree449146c9413335861a52a752b900d5e5693ddb1e /src/include/wrdd.h
parent918fc00fb40fb847acc4f4c8c9e9657b5e283e68 (diff)
soc/qualcomm/qcs405: Add MMU support
Initialize 1st 4GB as Device Memory, except: * 1st page: NULL address * System_IMEM: Cached SRAM * Boot_IMEM: Cached SRAM Change-Id: I8c6353be2c0379ec94f91223805762a2286de06d Signed-off-by: Sricharan R <sricharan@codeaurora.org> Signed-off-by: Nitheesh Sekar <nsekar@codeaurora.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/29950 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/include/wrdd.h')
0 files changed, 0 insertions, 0 deletions