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authorSumeet Pawnikar <sumeet.r.pawnikar@intel.com>2016-12-02 18:14:19 +0530
committerAaron Durbin <adurbin@chromium.org>2016-12-08 16:13:23 +0100
commit428f90afe7ea85aef023d4d799ac18436cbc3aed (patch)
treee8f0ae14299df6bfb97d2ba1b90c60e5e346a193 /src/include/wrdd.h
parent256db40b14ea6b9e587f99106994e54a24e21d7f (diff)
soc/intel/apollolake: Set PL2 in RAPL register
This patch sets the package power limit (PL2) value in RAPL register. BUG=chrome-os-partner:60535 TEST=Built, booted on reef and verified PL2 value. Change-Id: I83fe854cf3e9fc92ab87f84b86e64ebb6085065f Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com> Reviewed-on: https://review.coreboot.org/17699 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/include/wrdd.h')
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