diff options
author | Martin Roth <gaumless@gmail.com> | 2014-04-25 14:12:13 -0600 |
---|---|---|
committer | Martin Roth <martin.roth@se-eng.com> | 2014-05-09 21:35:56 +0200 |
commit | a6427161c20bfb8319208dbbd08697a530a3839e (patch) | |
tree | 4ad4c81145fd958ac98690327fb79e30de7fd738 /src/include/timestamp.h | |
parent | f18abab20047a23d7b29705ce274920ad36cd18a (diff) |
Intel FSP: add a shared set of functions for the FSP
- Move the non chipset-specific fsp pieces out of the chipset into a
shared area. This is used by northbridge / southbrige / SOC code. It
pulls in pieces from Kconfig, Makefile and FSP specific code.
- Enabled in the CPU code with a Kconfig "select PLATFORM_USES_FSP"
Change-Id: I7ffa934c1df09b71d48a876a56e3b888685870b8
Signed-off-by: Martin Roth <gaumless@gmail.com>
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/5635
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
Diffstat (limited to 'src/include/timestamp.h')
-rw-r--r-- | src/include/timestamp.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/include/timestamp.h b/src/include/timestamp.h index 9e780c3ecb..66c1d9ade5 100644 --- a/src/include/timestamp.h +++ b/src/include/timestamp.h @@ -43,12 +43,16 @@ enum timestamp_id { TS_END_COPYRAM = 9, TS_START_RAMSTAGE = 10, TS_DEVICE_ENUMERATE = 30, + TS_FSP_BEFORE_ENUMERATE, + TS_FSP_AFTER_ENUMERATE, TS_DEVICE_CONFIGURE = 40, TS_DEVICE_ENABLE = 50, TS_DEVICE_INITIALIZE = 60, TS_DEVICE_DONE = 70, TS_CBMEM_POST = 75, TS_WRITE_TABLES = 80, + TS_FSP_BEFORE_FINALIZE, + TS_FSP_AFTER_FINALIZE, TS_LOAD_PAYLOAD = 90, TS_ACPI_WAKE_JUMP = 98, TS_SELFBOOT_JUMP = 99, |