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authorZhiyong Tao <zhiyong.tao@mediatek.com>2022-03-24 18:57:44 +0800
committerFelix Held <felix-coreboot@felixheld.de>2022-03-29 14:22:48 +0000
commita7477706a096af540a5ee0ef04d0fca921fdab45 (patch)
treef3aa2676913254a2da58b7393c7d27b63341473c /src/include/timer.h
parent9648106683ab348acaa9cff6d4eb801915081418 (diff)
soc/mediatek/mt8186: Fix pmif setting for low power mode
The current pmif register setting for low power mode is incorrect, which is causing suspend failure. The issue of suspend failure is that SRCLKENA0 will not be pulled down. EC will not be informed AP is suspending now becuase of this. Therefore, add pmif_spmi_set_lp_mode() to correct the setting. This implementation is based on chapter 3.7 in MT8186 Functional Specification. BUG=b:215639203 TEST=test of suspend and resume pass. Signed-off-by: Zhiyong Tao <zhiyong.tao@mediatek.com> Change-Id: I2d02198f19f9cb052fba612c02404a6af1a10adb Reviewed-on: https://review.coreboot.org/c/coreboot/+/63089 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com> Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Diffstat (limited to 'src/include/timer.h')
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