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authorAamir Bohra <aamir.bohra@intel.com>2018-10-29 11:54:19 +0530
committerSubrata Banik <subrata.banik@intel.com>2018-11-02 03:20:39 +0000
commit49e0510d57e47e8b6013afd6699d87bd4da9a693 (patch)
tree73ef3aa51bb8edad52231bee64932d2b2fa39277 /src/include/sys
parent167a512d84c587c702cc0ed8918c00a2e225bac0 (diff)
mainboard/intel/icelake_rvp: Add ICL flash layout to support IFWI 1.6
Modify flash layout to match ICL-IFWI layout for early SoC PO support Flash Reg 0: Descriptor [0x0 - 0xFFF] Flash Reg 1: BIOS [0x400000 - 0xFFFFFF] Flash Reg 2: IFWI (consist of ME primary & secondary partition and PMC FW) [0x81000 - 0x3FFFFF] Flash Reg 8: EC (applicable for Intel RVP with internal EC support) [0x1000 - 0x80FFF] Change-Id: I462a384739b5972d9a59569ffdcadba7cdef6a81 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Signed-off-by: Aamir Bohra <aamir.bohra@intel.com> Reviewed-on: https://review.coreboot.org/29316 Reviewed-by: Shelley Chen <shchen@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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