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authorFurquan Shaikh <furquan@google.com>2020-06-10 15:35:44 -0700
committerFurquan Shaikh <furquan@google.com>2020-06-12 02:16:57 +0000
commitd5f1e0f9734273f79ebd313bb6a17eda04c22c11 (patch)
tree3bc7db5b4598e575793958054310cf0803d43e29 /src/include/superio
parent6740647cfd2d8ff8840d1e2ab37b66ce14b19180 (diff)
soc/amd/picasso: Reconfigure SPI speeds after FSP-S has run
This change reconfigures SPI speeds after FSP-S has run since FSP-S is currently configuring the SPI frequency when it should not. Until FSP-S behavior is fixed, this workaround needs to be applied. BUG=b:153506142 TEST=Verified that em100 works fine. Signed-off-by: Furquan Shaikh <furquan@google.com> Change-Id: Id9b8330c6f82c7162ff91e8cc10160fdd8cfedab Reviewed-on: https://review.coreboot.org/c/coreboot/+/42267 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Raul Rangel <rrangel@chromium.org>
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