soc/intel/alderlake: provide a list of D-states to enter LPM

Implement sub-function 1 (Get Device Constraints)
of the Low Power S0 Idle Device-Specific Method (_DSM).
This provides a way in which to describe various devices required
D-states to enter LPM (S0ix).  The information can be used to help
in diagnostics and understanding of S0ix entry failure.

Values were derived from Intel document 595644 (rev 0.45) and
the ADL FSP sample ASL.

This implementation adds support for ADL.  Other SoC's could be
ported to be included as well.  If they aren't, they will default
to the existing behavior of a single hardcoded device to ensure
compatibility with Windows.

TEST=Built and tested on brya by verifying SSDT contents

Change-Id: Ibe46a0583c522a8adf0a015cd3a698f694482437
Signed-off-by: Tarun Tuli <taruntuli@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63969
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Lance Zhao

0 files changed, 0 insertions, 0 deletions