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authorRizwan Qureshi <rizwan.qureshi@intel.com>2018-12-31 15:19:16 +0530
committerPatrick Georgi <pgeorgi@google.com>2019-01-21 13:25:31 +0000
commitf9f50936446e8e441238ecfe12ce0fc9e04d491a (patch)
tree2ce1ff776d013c72c8394da623f801facf7bd100 /src/include/spi-generic.h
parentafe15f0a34fd02ef024d48d2b047ecd4ef559d74 (diff)
drivers/spi: Add controller protection type
Some SPI controllers support both READ and WRITE protection add a variable to the protect API for the callers to specify the kind of protection they want (Read/Write/Both). Also, update the callers and protect API implementation. BUG=None BRANCH=None TEST=test that the mrc cache is protected as expected on soraka. Also tried if the read protection is applied correctly. Change-Id: I093884c4768b08a378f21242ac82e430ac013d15 Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com> Reviewed-on: https://review.coreboot.org/c/30559 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Diffstat (limited to 'src/include/spi-generic.h')
-rw-r--r--src/include/spi-generic.h9
1 files changed, 8 insertions, 1 deletions
diff --git a/src/include/spi-generic.h b/src/include/spi-generic.h
index e3e7f829f7..c24aadd926 100644
--- a/src/include/spi-generic.h
+++ b/src/include/spi-generic.h
@@ -97,6 +97,12 @@ struct spi_cfg {
struct spi_flash;
+enum ctrlr_prot_type {
+ READ_PROTECT = 1,
+ WRITE_PROTECT = 2,
+ READ_WRITE_PROTECT = 3,
+};
+
enum {
/* Deduct the command length from the spi_crop_chunk() calculation for
sizing a transaction. */
@@ -144,7 +150,8 @@ struct spi_ctrlr {
int (*flash_probe)(const struct spi_slave *slave,
struct spi_flash *flash);
int (*flash_protect)(const struct spi_flash *flash,
- const struct region *region);
+ const struct region *region,
+ const enum ctrlr_prot_type type);
};
/*-----------------------------------------------------------------------