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authorBruce Griffith <Bruce.Griffith@se-eng.com>2014-08-15 11:46:25 -0600
committerBruce Griffith <Bruce.Griffith@se-eng.com>2014-08-30 19:14:42 +0200
commit27ed80bce1da2d17fecd342a8150f790939150a1 (patch)
treeca6bc03987692a29d77c87a6862ca51f286152e6 /src/include/spd_ddr2.h
parent1a59039c24cfe5c74a805064d3a360709ad16526 (diff)
AMD Steppe Eagle: Add northbridge files for new SoC family
Add the northbridge file for AMD's new Mullins and Steppe Eagle processor family. Since the processor family name is not the same across AMD's sales and marketing channels, I have elected to use part of the processor ID as the family name. The intent is to reduce confusion since the processor ID is the same for both families. This northbridge support has only been validated on the AMD Embedded variants ("Steppe Eagle"). The AGESA wrappers in coreboot have a function that is intended to mirror the UMA memory allocation performed during memory initialization by AGESA. Update the Steppe Eagle memory allocation to mimic the memory reservation done inside the AGESA BLOB. Change the default CBMEM address, the default video BIOS device ID, and a couple of other defaults to match changes in coreboot community code. The northbridge chip.h specifies how many processor sockets, how many channels, and how many DIMM slots are supported by the northbridge. Steppe Eagle does not permit multisocket systems and has only one memory controller channel. Change-Id: I20d8b78e3b153cda2dd05100fbb75e2ebadd9e08 Signed-off-by: Bruce Griffith <Bruce.Griffith@se-eng.com> Reviewed-on: http://review.coreboot.org/6678 Tested-by: build bot (Jenkins) Reviewed-by: WANG Siyuan <wangsiyuanbuaa@gmail.com> Reviewed-by: Zheng Bao <zheng.bao@amd.com>
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