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authorYuchi Chen <yuchi.chen@intel.com>2024-09-03 22:58:00 +0800
committerLean Sheng Tan <sheng.tan@9elements.com>2024-11-09 10:19:38 +0000
commit7a7b4f05fc6375d63e2128c791006c5f9e1c45ac (patch)
tree5ea96775c896006d32a69730c974815d27b9f33c /src/include/spd_bin.h
parent031c078e8634c6436d27297e2b7810a5b75fc5b8 (diff)
include/spd_bin.h: Add SPD IO layer
By default, PCH SMBus codes will be called to retrieve SPD data. This patch adds a SPD IO layer so that SoC could implement its specific SPD IO layer functions such as using Integrated Memory Controller to get SPD data. Change-Id: I656298aeda409fca3c85266b5b8727fac9bfc917 Signed-off-by: Yuchi Chen <yuchi.chen@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84201 Reviewed-by: Shuo Liu <shuo.liu@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/include/spd_bin.h')
-rw-r--r--src/include/spd_bin.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/include/spd_bin.h b/src/include/spd_bin.h
index c51e449559..434d674755 100644
--- a/src/include/spd_bin.h
+++ b/src/include/spd_bin.h
@@ -49,6 +49,10 @@ uintptr_t spd_cbfs_map(u8 spd_index);
void dump_spd_info(struct spd_block *blk);
void get_spd_smbus(struct spd_block *blk);
+int spd_read_byte(u8 slave_addr, u8 bus_addr);
+int spd_read_word(u8 slave_addr, u8 bus_addr);
+void spd_write_byte(u8 slave_addr, u8 bus_addr, u8 value);
+
/*
* get_spd_sn returns the SODIMM serial number. It only supports DDR3 and DDR4.
* return CB_SUCCESS, sn is the serial number and sn=0xffffffff if the dimm is not present.