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authorAngel Pons <th3fanbus@gmail.com>2020-10-29 21:44:29 +0100
committerPatrick Georgi <pgeorgi@google.com>2021-02-01 08:50:24 +0000
commitf578b6f8f4374597cea5ce887c80216b5f7eccb9 (patch)
tree829ba2b7b42e80b5f631bde9e9f463b08306976f /src/include/sdram_mode.h
parent849104f2fb32188185d276ba68166a6537ed69c9 (diff)
nb/intel/haswell: Calculate TSEG limit from registers
Done for consistency with other northbridges. Change-Id: I08023809477c1cef0d7762b5e4fde65fadf6a6d8 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46991 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
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