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authorLean Sheng Tan <lean.sheng.tan@intel.com>2021-10-20 02:28:45 -0700
committerFelix Held <felix-coreboot@felixheld.de>2021-10-22 14:54:20 +0000
commitdc9b5efa8187ec886ab4ed360b8c4f9b2866c250 (patch)
treebfd7ef404339f800cec78692c483c261e7c8298a /src/include/sdram_mode.h
parentaed59b672177e5cec1727754c51dd6467b12a674 (diff)
soc/intel/elkhartlake: Add PSE PCI devices into header file
Since PSE devices could be initialized as either host owned (PCI devices) or PSE owned (will be hidden from coreboot and only visible to PSE interface), add all PSE devices in PCI list header file for future usage. Signed-off-by: Lean Sheng Tan <lean.sheng.tan@intel.com> Change-Id: Iaa40cdcb021d05e50504dd85f94e9c021e284d00 Reviewed-on: https://review.coreboot.org/c/coreboot/+/58466 Reviewed-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/include/sdram_mode.h')
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