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author | Angel Pons <th3fanbus@gmail.com> | 2021-03-28 13:57:47 +0200 |
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committer | Angel Pons <th3fanbus@gmail.com> | 2021-04-05 13:02:00 +0000 |
commit | 6c6e0492829771a63c5c175d5c7f431fc7447442 (patch) | |
tree | 844b629edbccb92022b43151e64474e93f40815a /src/include/sar.h | |
parent | acd30e90172084e1405a16405ec1f682b32d8985 (diff) |
device/dram/ddr4.h: Align with DDR3 and DDR2
Drop unnecessary typedefs and rename DDR4-specific definitions to avoid
name clashes, as done for DDR3 in earlier commits. This allows including
and using both DDR3 and DDR4 headers in the same compilation unit.
Change-Id: I17f1cd88f83251ec23e9783a617f4d2ed41b07f0
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51898
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/include/sar.h')
0 files changed, 0 insertions, 0 deletions