diff options
author | Bora Guvendik <bora.guvendik@intel.com> | 2023-03-30 13:54:36 -0700 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2023-05-10 13:07:17 +0000 |
commit | 396201c1ef52c14777a756d1962e18251a338076 (patch) | |
tree | c7df12bed959b0fc49a26fe70a5cc780fe73b6d0 /src/include/sar.h | |
parent | 15e7499cdd7cd5e38fb27eaa9a5f42123fb8995a (diff) |
soc/intel/cmn/pcie: Allow SoC to overwrite snoop/non-snoop latency
The Intel SoC Meteor Lake requires a higher pcie max non-snoop and
snoop latency tolerance. Add config to let SoC overwrite the common
code settings if needed.
BUG=none
TEST=Boot google/rex and print/check if able to overwrite values.
Change-Id: Ic2b9a158d219e6c6e7f6e7f0ae0f093c1183b402
Signed-off-by: Bora Guvendik <bora.guvendik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74141
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Diffstat (limited to 'src/include/sar.h')
0 files changed, 0 insertions, 0 deletions