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| author | Maulik V Vaghela <maulik.v.vaghela@intel.com> | 2020-03-17 16:58:02 +0530 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-03-18 16:52:48 +0000 |
| commit | 7eeaeeecc590d22a8f51175ba07cf2cfade19bfc (patch) | |
| tree | 363f9e1effd489aa79756c6688cf3cca893ff799 /src/include/rules.h | |
| parent | 11637452cc093a64e078edebe1d6e18b462c3757 (diff) | |
soc/intel/tigerlake: Correct number of gpio group for Jasper Lake
Correct number of gpio pad group for Jasper Lake SoC.
BUG=None
BRANCH=None
Test=Code compilation for Jasper Lake RVP
Change-Id: I381d0e48430e933569a3b22b66b4e6077383e9e2
Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39604
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aamir Bohra <aamir.bohra@intel.com>
Diffstat (limited to 'src/include/rules.h')
0 files changed, 0 insertions, 0 deletions