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authorAamir Bohra <aamir.bohra@intel.com>2019-12-06 19:51:39 +0530
committerPatrick Georgi <pgeorgi@google.com>2019-12-11 11:37:45 +0000
commitddb4b0d576ce8a7a8f36ce8a8ebcfb871c11b18b (patch)
tree7e9f1c78bee2e2fd8142fcb42f8615ecca9d37a7 /src/include/rtc.h
parenta7ddf4cdb050ba8576a8cfb6e0b3bccec9ab61aa (diff)
soc/intel/Kconfig: Load Tiger Lake SOC Kconfig
Change-Id: I25463f1b7b5d8242da3decf3e7a7ca54c699d467 Signed-off-by: Aamir Bohra <aamir.bohra@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37554 Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Maulik V Vaghela <maulik.v.vaghela@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/include/rtc.h')
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