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author | Lean Sheng Tan <sheng.tan@9elements.com> | 2022-05-18 17:01:40 +0200 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2022-06-07 12:45:30 +0000 |
commit | f6f9b306917d559141af0cf8f11306d19b251fd4 (patch) | |
tree | dfb3e5a83bcca280a4fdf6a94f337a637dd4173d /src/include/reset.h | |
parent | 88cd1a73e0a2473a8711cf14f14eaba26d9acec2 (diff) |
mb/intel/ehlcrb: Store vboot VBNV in SPI flash
Signed-off-by: Lean Sheng Tan <sheng.tan@9elements.com>
Change-Id: I0d609f0db475877d0ef1f47ab89c34dccb6e16d9
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64475
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Praveen HP <praveen.hodagatta.pranesh@intel.com>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Diffstat (limited to 'src/include/reset.h')
0 files changed, 0 insertions, 0 deletions