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authorTim Wawrzynczak <twawrzynczak@chromium.org>2021-06-17 12:42:35 -0600
committerTim Wawrzynczak <twawrzynczak@chromium.org>2021-06-30 22:19:35 +0000
commitc0e82e705d9a4747b1ccf7e6863c91c1e01bada7 (patch)
tree14e6c4b1b048293baa0e30f0d26b6ccf53b7ad1a /src/include/reset.h
parent9fdd2b264b1163009b5c3b0fd0a78df88d719192 (diff)
soc/intel/alderlake: Send End-of-Post message to CSE
This is done to ensure the CSE will not execute any pre-boot commands after it receives this command. Verified EOP and error recovery sequence from Intel doc#627331. TEST=on brya, autotest firmware_CheckEOPState confirms ME is in post-boot state Change-Id: Iee8c29f81d5d04852ae3f16dc8a9ff0fa59f056a Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55596 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/include/reset.h')
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