soc/intel/xeon_sp: Add SATC PCI segment group support

For every PCI segment group generate a new SATC header.
Allows to generate proper ACPI code when multiple PCI segment
groups are enabled.

TEST=Booted on ibm/sbp1 with multiple PCI segment groups.
      Properly generates multiple SATC headers.
TEST=intel/archercity CRB

Change-Id: I93b8ee05a7e6798e034f7a5da2c6883f0ee7a0e5
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81180
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>

0 files changed, 0 insertions, 0 deletions