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authorCoolStar <coolstarorganization@gmail.com>2024-02-23 13:39:55 -0800
committerMatt DeVillier <matt.devillier@gmail.com>2024-02-27 20:41:51 +0000
commit354a54ac84a934c1ee606d3f74dcd5a1f2606347 (patch)
treeb10d221f04992b9322b4b42c28aba68636c95aae /src/include/metadata_hash.h
parent377845a9d4f306082b8fcce3802f0d5e880647f3 (diff)
soc/intel/tigerlake: Remove IOM Mctp command from TCSS ASL
Port fix from Alder Lake to not set/reset IOM MCTP during D3 cold entry or exit. Ports 5008d340033d ("soc/intel/adl: Remove IOM Mctp command from TCSS ASL"): > Recently as part of s0ix hang issue, it was found that sending IOM > MCTP command as part of TCSS D3 Cold enter-exit sequence created an > issue. > We discovered that due to change in hardware sequence, ADL should not > set/reset IOM MCTP during D3 cold entry or exit. This patch removes > the bit setting from ASL file to prevent hang in the system. > This patch also removes obsolete Pcode mailbox communication which > is no longer required for ADL. > BUG=b:220796339 > BRANCH=firmware-brya-14505.B > TEST=Check if hang issue is resolved with the CL and no other > regression > observed > https://review.coreboot.org/c/coreboot/+/62861 Test: build/boot drobit to Win11. Verify TCSS XHCI power management working and USB Root Hub doesn't Code 43 in device manager Change-Id: I40a537fd2b0c821caf282f52aaff1874f54325f1 Signed-off-by: CoolStar <coolstarorganization@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/80719 Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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