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authorArthur Heymans <arthur@aheymans.xyz>2017-05-15 10:33:01 +0200
committerPatrick Georgi <pgeorgi@google.com>2018-05-14 07:41:58 +0000
commit66a0f55c2e2c6e042c58ae423901d7e41c5a2c84 (patch)
tree19bf9be143782db00e7103448f4b3d50d08cbc63 /src/include/memrange.h
parent7a3a319e3ac56853468f7787cf25f9bba6b261d3 (diff)
nb/intel/x4x/raminit: Support programming DDR3 timings
Also throws in some minor fixes like the wrong conditional for bankmod and using real CAS when programming MCHBAR(0x248). Change-Id: Ia2494684ec66d84d4dc27c6a6b425a33ace6e827 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/19873 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/include/memrange.h')
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