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authorRaul E Rangel <rrangel@chromium.org>2020-12-16 10:35:49 -0700
committerFelix Held <felix-coreboot@felixheld.de>2021-01-13 19:27:03 +0000
commit68b4b73670e750207414f0d85ff96f21481be8ce (patch)
tree4d477667094a7ab70f1724f3e04d648048be8399 /src/include/memrange.h
parentb52784136ee017d17078f9aec6533fd3b1b896c4 (diff)
soc/amd/picasso: Disable CBFS MCACHE
This is causing boot errors on zork: coreboot-v1.9308_26_0.0.22-18590-g4598a7bed945 Wed Dec 16 17:32:25 UTC 2020 bootblock starting (log level: 8)... Family_Model: 00820f01 PSP boot mode: Development Silicon level: Pre-Production PMxC0 STATUS: 0x800 BIT11 I2C bus 3 version 0x3132322a DW I2C bus 3 at 0xfedc5000 (400 KHz) FMAP: area FW_MAIN_B found @ 312000 (3137280 bytes) ASSERTION ERROR: file 'src/commonlib/bsd/cbfs_mcache.c', line 106 BUG=b:177323348 TEST=Boot ezkinil to OS Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: I1f2bbdd9c87c4efdfb0042e90a20b489fa0efced Reviewed-on: https://review.coreboot.org/c/coreboot/+/49128 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/include/memrange.h')
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