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authorTan, Lean Sheng <lean.sheng.tan@intel.com>2020-09-03 07:08:53 -0700
committerPatrick Georgi <pgeorgi@google.com>2020-09-08 05:30:44 +0000
commitaab188174f7fa349ef395ecb38a41d5b6cf45e92 (patch)
tree4c2e25753bed32087765353c7f80ac781218c5f4 /src/include/halt.h
parentb369dde9b1cc9daffce83dc809101e0fd0a0e346 (diff)
soc/intel/elkhartlake: Update SA & PM related definitions
1. Update SA base address & size 2. Update GBE control bit register value Signed-off-by: Tan, Lean Sheng <lean.sheng.tan@intel.com> Change-Id: I1f5036c9cd75682fcf239170bcb257ffaa002e7d Reviewed-on: https://review.coreboot.org/c/coreboot/+/45077 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
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