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author | Patrick Rudolph <patrick.rudolph@9elements.com> | 2024-03-12 18:32:35 +0100 |
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committer | Arthur Heymans <arthur@aheymans.xyz> | 2024-03-19 09:56:49 +0000 |
commit | 8061957cc12769714e7041093c065c6d6d212249 (patch) | |
tree | 40379a2ac52cd0ab971852394d9d01cf1181728e /src/include/gpio.h | |
parent | d425e881e339e8f92c48237d1e212275c5a7cdc3 (diff) |
soc/intel/xeon_sp: Initial support for PCI multi segment groups
Add PCI enumeration support by reading the PCIeSegment reported in the
FSP HOB and add it when creating the PCI domain for each stack.
The PCI enumeration will be able to scan the additional PCI segment
groups and properly handle those devices.
TEST=Booted on ibm/sbp1 with multiple PCI segment groups enabled
to ubuntu 22.04.
TEST=intel/archercity CRB
Change-Id: I0ba5e426123234979d746d3bdfc1ddfbd71c3447
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79878
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Shuo Liu <shuo.liu@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/include/gpio.h')
0 files changed, 0 insertions, 0 deletions