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author | Garmin Chang <Garmin.Chang@mediatek.com> | 2022-09-12 18:00:21 +0800 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2022-09-14 12:00:06 +0000 |
commit | c7b549ec996de4fcb34895d5ed8fd13adb9ba53b (patch) | |
tree | e33e59da60bdc09386f9b4da91775e805463fdbb /src/include/endian.h | |
parent | 5f9395cbc10ff9db406f0eae77a7d585e1c73b7c (diff) |
soc/mediatek/mt8188: Change vpp_sel default mux for 4k support
vpp_sel and ethdr_sel are vdosys clock source select mux.
Steps to change to support 4K source:
1. Change vpp_sel source to mainpll_d6 to run at 416MHz.
2. Change ethdr_sel source to univpll_d6 to run at 416MHz.
BUG=b:233720142
TEST=build pass.
Signed-off-by: Garmin Chang <Garmin.Chang@mediatek.com>
Change-Id: I24f133b9b383fd019983cb29a213b47717148e97
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67545
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/include/endian.h')
0 files changed, 0 insertions, 0 deletions