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authorSean Rhodes <sean@starlabs.systems>2022-09-07 13:13:42 +0100
committerFelix Held <felix-coreboot@felixheld.de>2022-09-08 15:33:20 +0000
commite7bdc1b9e0219ec7598969a4e1d7f34213170261 (patch)
treec3f8c4a2874f5cb5906482258d32ef55471c1a17 /src/include/device
parente078b058e3a706e1729adb5f27470eae077edcc8 (diff)
soc/intel/commmon/fast_spi: Add missing ID for GLK
PCI ID taken from Intel doc #569262. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I5812e536f3e1c49a272a0b337cc69f3d8f30677f Reviewed-on: https://review.coreboot.org/c/coreboot/+/67402 Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/include/device')
-rw-r--r--src/include/device/pci_ids.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h
index fbc0293959..155668e659 100644
--- a/src/include/device/pci_ids.h
+++ b/src/include/device/pci_ids.h
@@ -3770,6 +3770,7 @@
#define PCI_DID_INTEL_GLK_SPI0 0x31c2
#define PCI_DID_INTEL_GLK_SPI1 0x31c4
#define PCI_DID_INTEL_GLK_SPI2 0x31c6
+#define PCI_DID_INTEL_GLK_HWSEQ_SPI 0x3196
#define PCI_DID_INTEL_CNL_SPI0 0x9daa
#define PCI_DID_INTEL_CNL_SPI1 0x9dab
#define PCI_DID_INTEL_CNL_SPI2 0x9dfb