diff options
| author | Usha P <usha.p@intel.com> | 2022-01-17 20:24:31 +0530 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-02-11 23:55:20 +0000 |
| commit | af5a9d64a565d76dc472d1bb16e4adaa423ca0b5 (patch) | |
| tree | 18fe763728b565713c33e037a40bad1cf0ebb5e1 /src/include/device | |
| parent | 6f0b5b3e6bc84dcf2edcc3f6af460af934de5e7f (diff) | |
soc/intel/common: Re-use Alder Lake-M device IDs for Alder Lake-N
Few of the Alder Lake-N Device IDs according to EDS, are named as ADL_M
IDs in the current code. Hence rename those device IDs as ADL_M_N and
use them for Alder Lake-N platform.
Document Number: 619501, 645548
Signed-off-by: Usha P <usha.p@intel.com>
Change-Id: I6042017c6189cbc3ca9dce0e50acfb68ea4003f1
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61162
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Reviewed-by: Kangheui Won <khwon@chromium.org>
Diffstat (limited to 'src/include/device')
| -rw-r--r-- | src/include/device/pci_ids.h | 122 |
1 files changed, 61 insertions, 61 deletions
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index e1c9730edd..6854e791a6 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -3039,38 +3039,38 @@ #define PCI_DEVICE_ID_INTEL_ADP_S_ESPI_29 0x7a9d #define PCI_DEVICE_ID_INTEL_ADP_S_ESPI_30 0x7a9e #define PCI_DEVICE_ID_INTEL_ADP_S_ESPI_31 0x7a9f -#define PCI_DEVICE_ID_INTEL_ADP_M_ESPI_0 0x5480 -#define PCI_DEVICE_ID_INTEL_ADP_M_ESPI_1 0x5481 -#define PCI_DEVICE_ID_INTEL_ADP_M_ESPI_2 0x5482 -#define PCI_DEVICE_ID_INTEL_ADP_M_ESPI_3 0x5483 -#define PCI_DEVICE_ID_INTEL_ADP_M_ESPI_4 0x5484 -#define PCI_DEVICE_ID_INTEL_ADP_M_ESPI_5 0x5485 -#define PCI_DEVICE_ID_INTEL_ADP_M_ESPI_6 0x5486 -#define PCI_DEVICE_ID_INTEL_ADP_M_ESPI_7 0x5487 -#define PCI_DEVICE_ID_INTEL_ADP_M_ESPI_8 0x5488 -#define PCI_DEVICE_ID_INTEL_ADP_M_ESPI_9 0x5489 -#define PCI_DEVICE_ID_INTEL_ADP_M_ESPI_10 0x548a -#define PCI_DEVICE_ID_INTEL_ADP_M_ESPI_11 0x548b -#define PCI_DEVICE_ID_INTEL_ADP_M_ESPI_12 0x548c -#define PCI_DEVICE_ID_INTEL_ADP_M_ESPI_13 0x548d -#define PCI_DEVICE_ID_INTEL_ADP_M_ESPI_14 0x548e -#define PCI_DEVICE_ID_INTEL_ADP_M_ESPI_15 0x548f -#define PCI_DEVICE_ID_INTEL_ADP_M_ESPI_16 0x5490 -#define PCI_DEVICE_ID_INTEL_ADP_M_ESPI_17 0x5491 -#define PCI_DEVICE_ID_INTEL_ADP_M_ESPI_18 0x5482 -#define PCI_DEVICE_ID_INTEL_ADP_M_ESPI_19 0x5493 -#define PCI_DEVICE_ID_INTEL_ADP_M_ESPI_20 0x5494 -#define PCI_DEVICE_ID_INTEL_ADP_M_ESPI_21 0x5495 -#define PCI_DEVICE_ID_INTEL_ADP_M_ESPI_22 0x5496 -#define PCI_DEVICE_ID_INTEL_ADP_M_ESPI_23 0x5497 -#define PCI_DEVICE_ID_INTEL_ADP_M_ESPI_24 0x5498 -#define PCI_DEVICE_ID_INTEL_ADP_M_ESPI_25 0x5499 -#define PCI_DEVICE_ID_INTEL_ADP_M_ESPI_26 0x549a -#define PCI_DEVICE_ID_INTEL_ADP_M_ESPI_27 0x549b -#define PCI_DEVICE_ID_INTEL_ADP_M_ESPI_28 0x548c -#define PCI_DEVICE_ID_INTEL_ADP_M_ESPI_29 0x549d -#define PCI_DEVICE_ID_INTEL_ADP_M_ESPI_30 0x549e -#define PCI_DEVICE_ID_INTEL_ADP_M_ESPI_31 0x549f +#define PCI_DEVICE_ID_INTEL_ADP_M_N_ESPI_0 0x5480 +#define PCI_DEVICE_ID_INTEL_ADP_M_N_ESPI_1 0x5481 +#define PCI_DEVICE_ID_INTEL_ADP_M_N_ESPI_2 0x5482 +#define PCI_DEVICE_ID_INTEL_ADP_M_N_ESPI_3 0x5483 +#define PCI_DEVICE_ID_INTEL_ADP_M_N_ESPI_4 0x5484 +#define PCI_DEVICE_ID_INTEL_ADP_M_N_ESPI_5 0x5485 +#define PCI_DEVICE_ID_INTEL_ADP_M_N_ESPI_6 0x5486 +#define PCI_DEVICE_ID_INTEL_ADP_M_N_ESPI_7 0x5487 +#define PCI_DEVICE_ID_INTEL_ADP_M_N_ESPI_8 0x5488 +#define PCI_DEVICE_ID_INTEL_ADP_M_N_ESPI_9 0x5489 +#define PCI_DEVICE_ID_INTEL_ADP_M_N_ESPI_10 0x548a +#define PCI_DEVICE_ID_INTEL_ADP_M_N_ESPI_11 0x548b +#define PCI_DEVICE_ID_INTEL_ADP_M_N_ESPI_12 0x548c +#define PCI_DEVICE_ID_INTEL_ADP_M_N_ESPI_13 0x548d +#define PCI_DEVICE_ID_INTEL_ADP_M_N_ESPI_14 0x548e +#define PCI_DEVICE_ID_INTEL_ADP_M_N_ESPI_15 0x548f +#define PCI_DEVICE_ID_INTEL_ADP_M_N_ESPI_16 0x5490 +#define PCI_DEVICE_ID_INTEL_ADP_M_N_ESPI_17 0x5491 +#define PCI_DEVICE_ID_INTEL_ADP_M_N_ESPI_18 0x5482 +#define PCI_DEVICE_ID_INTEL_ADP_M_N_ESPI_19 0x5493 +#define PCI_DEVICE_ID_INTEL_ADP_M_N_ESPI_20 0x5494 +#define PCI_DEVICE_ID_INTEL_ADP_M_N_ESPI_21 0x5495 +#define PCI_DEVICE_ID_INTEL_ADP_M_N_ESPI_22 0x5496 +#define PCI_DEVICE_ID_INTEL_ADP_M_N_ESPI_23 0x5497 +#define PCI_DEVICE_ID_INTEL_ADP_M_N_ESPI_24 0x5498 +#define PCI_DEVICE_ID_INTEL_ADP_M_N_ESPI_25 0x5499 +#define PCI_DEVICE_ID_INTEL_ADP_M_N_ESPI_26 0x549a +#define PCI_DEVICE_ID_INTEL_ADP_M_N_ESPI_27 0x549b +#define PCI_DEVICE_ID_INTEL_ADP_M_N_ESPI_28 0x548c +#define PCI_DEVICE_ID_INTEL_ADP_M_N_ESPI_29 0x549d +#define PCI_DEVICE_ID_INTEL_ADP_M_N_ESPI_30 0x549e +#define PCI_DEVICE_ID_INTEL_ADP_M_N_ESPI_31 0x549f #define PCI_DEVICE_ID_INTEL_ADP_M_ESPI_32 0x5186 #define PCI_DEVICE_ID_INTEL_SPR_ESPI_1 0x1b80 @@ -3397,16 +3397,16 @@ #define PCI_DEVICE_ID_INTEL_ADP_S_PCIE_RP27 0x7aca #define PCI_DEVICE_ID_INTEL_ADP_S_PCIE_RP28 0x7acb -#define PCI_DEVICE_ID_INTEL_ADP_M_PCIE_RP1 0x54b8 -#define PCI_DEVICE_ID_INTEL_ADP_M_PCIE_RP2 0x54b9 -#define PCI_DEVICE_ID_INTEL_ADP_M_PCIE_RP3 0x54ba -#define PCI_DEVICE_ID_INTEL_ADP_M_PCIE_RP4 0x54bb +#define PCI_DEVICE_ID_INTEL_ADP_M_N_PCIE_RP1 0x54b8 +#define PCI_DEVICE_ID_INTEL_ADP_M_N_PCIE_RP2 0x54b9 +#define PCI_DEVICE_ID_INTEL_ADP_M_N_PCIE_RP3 0x54ba +#define PCI_DEVICE_ID_INTEL_ADP_M_N_PCIE_RP4 0x54bb #define PCI_DEVICE_ID_INTEL_ADP_M_PCIE_RP5 0x54bc #define PCI_DEVICE_ID_INTEL_ADP_M_PCIE_RP6 0x54bd -#define PCI_DEVICE_ID_INTEL_ADP_M_PCIE_RP7 0x54be +#define PCI_DEVICE_ID_INTEL_ADP_M_N_PCIE_RP7 0x54be #define PCI_DEVICE_ID_INTEL_ADP_M_PCIE_RP8 0x54bf -#define PCI_DEVICE_ID_INTEL_ADP_M_PCIE_RP9 0x54b0 -#define PCI_DEVICE_ID_INTEL_ADP_M_PCIE_RP10 0x54b1 +#define PCI_DEVICE_ID_INTEL_ADP_M_N_PCIE_RP9 0x54b0 +#define PCI_DEVICE_ID_INTEL_ADP_M_N_PCIE_RP10 0x54b1 #define PCI_DEVICE_ID_INTEL_ADP_N_PCIE_RP11 0x54b2 #define PCI_DEVICE_ID_INTEL_ADP_N_PCIE_RP12 0x54b3 @@ -3501,7 +3501,7 @@ #define PCI_DEVICE_ID_INTEL_JSP_PMC 0x4da1 #define PCI_DEVICE_ID_INTEL_ADP_P_PMC 0x7a21 #define PCI_DEVICE_ID_INTEL_ADP_S_PMC 0x7aa1 -#define PCI_DEVICE_ID_INTEL_ADP_M_PMC 0x54a1 +#define PCI_DEVICE_ID_INTEL_ADP_M_N_PMC 0x54a1 /* Intel I2C device Ids */ #define PCI_DEVICE_ID_INTEL_LPT_LP_I2C0 0x9c61 @@ -3605,12 +3605,12 @@ #define PCI_DEVICE_ID_INTEL_ADP_S_I2C4 0x7afc #define PCI_DEVICE_ID_INTEL_ADP_S_I2C5 0x7afd -#define PCI_DEVICE_ID_INTEL_ADP_M_I2C0 0x54e8 -#define PCI_DEVICE_ID_INTEL_ADP_M_I2C1 0x54e9 -#define PCI_DEVICE_ID_INTEL_ADP_M_I2C2 0x54ea -#define PCI_DEVICE_ID_INTEL_ADP_M_I2C3 0x54eb -#define PCI_DEVICE_ID_INTEL_ADP_M_I2C4 0x54c5 -#define PCI_DEVICE_ID_INTEL_ADP_M_I2C5 0x54c6 +#define PCI_DEVICE_ID_INTEL_ADP_M_N_I2C0 0x54e8 +#define PCI_DEVICE_ID_INTEL_ADP_M_N_I2C1 0x54e9 +#define PCI_DEVICE_ID_INTEL_ADP_M_N_I2C2 0x54ea +#define PCI_DEVICE_ID_INTEL_ADP_M_N_I2C3 0x54eb +#define PCI_DEVICE_ID_INTEL_ADP_M_N_I2C4 0x54c5 +#define PCI_DEVICE_ID_INTEL_ADP_M_N_I2C5 0x54c6 /* Intel UART device Ids */ #define PCI_DEVICE_ID_INTEL_LPT_LP_UART0 0x9c63 @@ -3677,10 +3677,10 @@ #define PCI_DEVICE_ID_INTEL_ADP_S_UART5 0x7ade #define PCI_DEVICE_ID_INTEL_ADP_S_UART6 0x7adf -#define PCI_DEVICE_ID_INTEL_ADP_M_UART0 0x54a8 -#define PCI_DEVICE_ID_INTEL_ADP_M_UART1 0x54a9 -#define PCI_DEVICE_ID_INTEL_ADP_M_UART2 0x54c7 -#define PCI_DEVICE_ID_INTEL_ADP_M_UART3 0x54da +#define PCI_DEVICE_ID_INTEL_ADP_M_N_UART0 0x54a8 +#define PCI_DEVICE_ID_INTEL_ADP_M_N_UART1 0x54a9 +#define PCI_DEVICE_ID_INTEL_ADP_M_N_UART2 0x54c7 +#define PCI_DEVICE_ID_INTEL_ADP_M_N_UART3 0x54da /* Intel SPI device Ids */ #define PCI_DEVICE_ID_INTEL_LPT_LP_GSPI0 0x9c65 @@ -3757,9 +3757,9 @@ #define PCI_DEVICE_ID_INTEL_ADP_S_SPI5 0x7aee #define PCI_DEVICE_ID_INTEL_ADP_S_SPI6 0x7aef -#define PCI_DEVICE_ID_INTEL_ADP_M_HWSEQ_SPI 0x54a4 -#define PCI_DEVICE_ID_INTEL_ADP_M_SPI0 0x54aa -#define PCI_DEVICE_ID_INTEL_ADP_M_SPI1 0x54ab +#define PCI_DEVICE_ID_INTEL_ADP_M_N_HWSEQ_SPI 0x54a4 +#define PCI_DEVICE_ID_INTEL_ADP_M_N_SPI0 0x54aa +#define PCI_DEVICE_ID_INTEL_ADP_M_N_SPI1 0x54ab #define PCI_DEVICE_ID_INTEL_ADP_M_SPI2 0x54fb #define PCI_DEVICE_ID_INTEL_SPR_HWSEQ_SPI 0x1bca @@ -4050,7 +4050,7 @@ #define PCI_DEVICE_ID_INTEL_JSP_SMBUS 0x4da3 #define PCI_DEVICE_ID_INTEL_ADP_P_SMBUS 0xa0a3 #define PCI_DEVICE_ID_INTEL_ADP_S_SMBUS 0x7aa3 -#define PCI_DEVICE_ID_INTEL_ADP_M_SMBUS 0x54a3 +#define PCI_DEVICE_ID_INTEL_ADP_M_N_SMBUS 0x54a3 /* Intel EHCI device IDs */ #define PCI_DEVICE_ID_INTEL_LPT_H_EHCI_1 0x8c26 @@ -4146,13 +4146,13 @@ #define PCI_DEVICE_ID_INTEL_ADP_S_AUDIO_8 0x7ad7 #define PCI_DEVICE_ID_INTEL_ADP_P_AUDIO 0x51c8 -#define PCI_DEVICE_ID_INTEL_ADP_M_AUDIO_1 0x54c8 -#define PCI_DEVICE_ID_INTEL_ADP_M_AUDIO_2 0x54c9 -#define PCI_DEVICE_ID_INTEL_ADP_M_AUDIO_3 0x54ca -#define PCI_DEVICE_ID_INTEL_ADP_M_AUDIO_4 0x54cb -#define PCI_DEVICE_ID_INTEL_ADP_M_AUDIO_5 0x54cc -#define PCI_DEVICE_ID_INTEL_ADP_M_AUDIO_6 0x54cd -#define PCI_DEVICE_ID_INTEL_ADP_M_AUDIO_7 0x54ce +#define PCI_DEVICE_ID_INTEL_ADP_M_N_AUDIO_1 0x54c8 +#define PCI_DEVICE_ID_INTEL_ADP_M_N_AUDIO_2 0x54c9 +#define PCI_DEVICE_ID_INTEL_ADP_M_N_AUDIO_3 0x54ca +#define PCI_DEVICE_ID_INTEL_ADP_M_N_AUDIO_4 0x54cb +#define PCI_DEVICE_ID_INTEL_ADP_M_N_AUDIO_5 0x54cc +#define PCI_DEVICE_ID_INTEL_ADP_M_N_AUDIO_6 0x54cd +#define PCI_DEVICE_ID_INTEL_ADP_M_N_AUDIO_7 0x54ce /* Intel HECI/ME device Ids */ #define PCI_DEVICE_ID_INTEL_LPT_H_MEI 0x8c3a |