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authorKrishna Prasad Bhat <krishna.p.bhat.d@intel.com>2022-02-15 10:58:39 +0530
committerFelix Held <felix-coreboot@felixheld.de>2022-02-16 15:38:34 +0000
commit8d436cfc1acc7a15cd821e3fb61ad1b0f797a312 (patch)
treec5b4a1b374392de85d6283290be4abeb6b2dbe5d /src/include/device
parent7d8b553608c1e58e5e23a179a8685a3e855d2e53 (diff)
soc/intel/alderlake: Correct Alder Lake M/N ESPI device ID
Alder Lake M/N ESPI ID 18 was incorrectly assigned to be 0x5482. Assign it to the correct value. Reference documents: 619501, 645548. Change-Id: I08bd218fd128497825b96aa5b9496826afa620d2 Signed-off-by: Krishna Prasad Bhat <krishna.p.bhat.d@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/61947 Reviewed-by: Usha P <usha.p@intel.com> Reviewed-by: Kangheui Won <khwon@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/include/device')
-rw-r--r--src/include/device/pci_ids.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h
index 6854e791a6..042e10efef 100644
--- a/src/include/device/pci_ids.h
+++ b/src/include/device/pci_ids.h
@@ -3057,7 +3057,7 @@
#define PCI_DEVICE_ID_INTEL_ADP_M_N_ESPI_15 0x548f
#define PCI_DEVICE_ID_INTEL_ADP_M_N_ESPI_16 0x5490
#define PCI_DEVICE_ID_INTEL_ADP_M_N_ESPI_17 0x5491
-#define PCI_DEVICE_ID_INTEL_ADP_M_N_ESPI_18 0x5482
+#define PCI_DEVICE_ID_INTEL_ADP_M_N_ESPI_18 0x5492
#define PCI_DEVICE_ID_INTEL_ADP_M_N_ESPI_19 0x5493
#define PCI_DEVICE_ID_INTEL_ADP_M_N_ESPI_20 0x5494
#define PCI_DEVICE_ID_INTEL_ADP_M_N_ESPI_21 0x5495