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authorKyösti Mälkki <kyosti.malkki@gmail.com>2014-02-14 12:45:09 +0200
committerPatrick Georgi <patrick@georgi-clan.de>2014-04-09 11:29:45 +0200
commit4c686f2106a33e7a452bec163c178724a0313616 (patch)
treee47f615d45fe9ca7860fb60fc2951c53a16166f1 /src/include/device
parentafa7b13b9355b3df3da7606d434cb8b450316ab9 (diff)
OxPCIe uart: Split PCI bridge control
None of the PCI bridge management here is specific to the PCI UART device/function. Also the Kconfig variable defaults are not globally valid, fill samsung/lumpy with working values. Change-Id: Id22631412379af1d6bf62c996357d36d7ec47ca3 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/5237 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Diffstat (limited to 'src/include/device')
-rw-r--r--src/include/device/pci.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/include/device/pci.h b/src/include/device/pci.h
index 29d988fd9e..f729c2726c 100644
--- a/src/include/device/pci.h
+++ b/src/include/device/pci.h
@@ -102,6 +102,8 @@ static inline const struct pci_operations *ops_pci(device_t dev)
unsigned pci_find_next_capability(device_t dev, unsigned cap, unsigned last);
unsigned pci_find_capability(device_t dev, unsigned cap);
+void pci_early_bridge_init(void);
+int pci_early_device_probe(u8 bus, u8 dev, u32 mmio_base);
#endif /* CONFIG_PCI */