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authorCliff Huang <cliff.huang@intel.com>2024-03-17 23:36:51 -0700
committerEric Lai <ericllai@google.com>2024-04-02 07:46:24 +0000
commit45348cdf3930622c47381fa090602b1578d4c7e1 (patch)
tree7b462d5e36befc487c064a2a61424df0d9696806 /src/include/device
parent5776aef0f3ef7c2f2cc78dddaaa3680047155de4 (diff)
include/device/pci_ids.h: Add DIDs for MTL Touch controller
When touch controller is configured as THC-SPI mode, DID is 0x7e49 for THC0, and 0x7e4b for THC1. 0x7e48 and 0x7ea4 are the DIDs when ThcMode is 0 (default) for THC0 and THC1 respectively. Refer MTL EDS vol 1: 640228. BUG=b:307775082 Signed-off-by: Cliff Huang <cliff.huang@intel.com> Change-Id: I1b98fdbd8d8588492bcafa0f3998818dc83ff1d9 Reviewed-on: https://review.coreboot.org/c/coreboot/+/81330 Reviewed-by: Eric Lai <ericllai@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyoung Il Kim <kyoung.il.kim@intel.com>
Diffstat (limited to 'src/include/device')
-rw-r--r--src/include/device/pci_ids.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h
index 1ae09f0555..7831d5b575 100644
--- a/src/include/device/pci_ids.h
+++ b/src/include/device/pci_ids.h
@@ -4721,6 +4721,12 @@
#define PCI_DID_INTEL_EHL_GBE_PSE_0 0x4BA0
#define PCI_DID_INTEL_EHL_GBE_PSE_1 0x4BB0
+/* Intel Touch Controller */
+#define PCI_DID_INTEL_MTL_THC0_1 0x7e48
+#define PCI_DID_INTEL_MTL_THC0_2 0x7e49
+#define PCI_DID_INTEL_MTL_THC1_1 0x7e4a
+#define PCI_DID_INTEL_MTL_THC1_2 0x7e4b
+
#define PCI_VID_COMPUTONE 0x8e0e
#define PCI_DID_COMPUTONE_IP2EX 0x0291
#define PCI_DID_COMPUTONE_PG 0x0302