diff options
| author | Bora Guvendik <bora.guvendik@intel.com> | 2021-07-23 14:12:57 -0700 |
|---|---|---|
| committer | Paul Fagerburg <pfagerburg@chromium.org> | 2021-08-05 15:55:20 +0000 |
| commit | 3198848dfa8ace97500d28a81124ba129aee84ca (patch) | |
| tree | 47e6cfeb2b9ce0f797f71001ffa23b06a4da9175 /src/include/device | |
| parent | 9b73c2b2f485c002626ee404372475cdd8e2543a (diff) | |
soc/intel/alderlake: Add GFx Device ID 0x46aa
This CL adds support for new ADL-M graphics Device ID 0x46aa.
TEST=boot to OS
Signed-off-by: Bora Guvendik <bora.guvendik@intel.com>
Change-Id: Ib24b494b0eedad447f3b2a3d1d80c9941680c25d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56775
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Anil Kumar K <anil.kumar.k@intel.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/include/device')
| -rw-r--r-- | src/include/device/pci_ids.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index a4458ea89a..375704612c 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -3824,6 +3824,7 @@ #define PCI_DEVICE_ID_INTEL_ADL_P_GT2_6 0x46a6 #define PCI_DEVICE_ID_INTEL_ADL_S_GT1 0x4680 #define PCI_DEVICE_ID_INTEL_ADL_M_GT1 0x46c0 +#define PCI_DEVICE_ID_INTEL_ADL_M_GT2 0x46aa /* Intel Northbridge Ids */ #define PCI_DEVICE_ID_INTEL_APL_NB 0x5af0 |