Add buffer_to/from_fifo32(_prefix) helpers

Many peripheral drivers across different SoCs regularly face the same
task of piping a transfer buffer into (or reading it out of) a 32-bit
FIFO register. Sometimes it's just one register, sometimes a whole array
of registers. Sometimes you actually transfer 4 bytes per register
read/write, sometimes only 2 (or even 1). Sometimes writes need to be
prefixed with one or two command bytes which makes the actual payload
buffer "misaligned" in relation to the FIFO and requires a bunch of
tricky bit packing logic to get right. Most of the times transfer
lengths are not guaranteed to be divisible by 4, which also requires a
bunch of logic to treat the potential unaligned end of the transfer
correctly.

We have a dozen different implementations of this same pattern across
coreboot. This patch introduces a new family of helper functions that
aims to solve all these use cases once and for all (*fingers crossed*).

Change-Id: Ia71f66c1cee530afa4c77c46a838b4de646ffcfb
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34850
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>

1 files changed, 36 insertions, 1 deletions

diff --git a/src/include/device/mmio.h b/src/include/device/mmio.h
index 34be1e8172..e40b40f49f 100644
--- a/src/include/device/mmio.h
+++ b/src/include/device/mmio.h
@@ -17,5 +17,40 @@
 
 #include <arch/mmio.h>
 #include <endian.h>
+#include <types.h>
 
-#endif
+#ifndef __ROMCC__
+/*
+ * Reads a transfer buffer from 32-bit FIFO registers. fifo_stride is the
+ * distance in bytes between registers (e.g. pass 4 for a normal array of 32-bit
+ * registers or 0 to read everything from the same register). fifo_width is
+ * the amount of bytes read per register (can be 1 through 4).
+ */
+void buffer_from_fifo32(void *buffer, size_t size, void *fifo,
+			int fifo_stride, int fifo_width);
+
+/*
+ * Version of buffer_to_fifo32() that can prepend a prefix of up to fifo_width
+ * size to the transfer. This is often useful for protocols where a command word
+ * precedes the actual payload data. The prefix must be packed in the low-order
+ * bytes of the 'prefix' u32 parameter and any high-order bytes exceeding prefsz
+ * must be 0. Note that 'size' counts total bytes written, including 'prefsz'.
+ */
+void buffer_to_fifo32_prefix(void *buffer, u32 prefix, int prefsz, size_t size,
+			     void *fifo, int fifo_stride, int fifo_width);
+
+/*
+ * Writes a transfer buffer into 32-bit FIFO registers. fifo_stride is the
+ * distance in bytes between registers (e.g. pass 4 for a normal array of 32-bit
+ * registers or 0 to write everything into the same register). fifo_width is
+ * the amount of bytes written per register (can be 1 through 4).
+ */
+static inline void buffer_to_fifo32(void *buffer, size_t size, void *fifo,
+				    int fifo_stride, int fifo_width)
+{
+	buffer_to_fifo32_prefix(buffer, size, 0, 0, fifo,
+				fifo_stride, fifo_width);
+}
+#endif	/* !__ROMCC__ */
+
+#endif	/* __DEVICE_MMIO_H__ */