diff options
| author | Duncan Laurie <dlaurie@chromium.org> | 2011-10-25 14:15:11 -0700 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2012-03-29 22:16:07 +0200 |
| commit | 90dcdd43ee83b12ddd1cdafba7613971cbfa2117 (patch) | |
| tree | a86c9e122215b93566e9f9174e8919f81b08a813 /src/include/device/pciexp.h | |
| parent | 22c0468d3927a370b9723e9e78714c2731d33a81 (diff) | |
Add support for enabling PCIe Common Clock and ASPM
These are guarded by individual Kconfig entries. The deprecated
CONFIG_PCIE_TUNING defines have been removed in favor of using specific
config options.
This is the generic half, there is board-specific pieces
still to come that tune before and after ASPM is enabled.
Change-Id: I3fe46282eada67629e9eeeed07e487dff54f2729
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Reviewed-on: http://review.coreboot.org/735
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/include/device/pciexp.h')
| -rw-r--r-- | src/include/device/pciexp.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/src/include/device/pciexp.h b/src/include/device/pciexp.h index 409f211a82..87a5002c5e 100644 --- a/src/include/device/pciexp.h +++ b/src/include/device/pciexp.h @@ -2,6 +2,13 @@ #define DEVICE_PCIEXP_H /* (c) 2005 Linux Networx GPL see COPYING for details */ +enum aspm_type { + PCIE_ASPM_NONE = 0, + PCIE_ASPM_L0S = 1, + PCIE_ASPM_L1 = 2, + PCIE_ASPM_BOTH = 3, +}; + unsigned int pciexp_scan_bus(struct bus *bus, unsigned int min_devfn, unsigned int max_devfn, unsigned int max); unsigned int pciexp_scan_bridge(device_t dev, unsigned int max); |