diff options
author | Felix Held <felix-coreboot@felixheld.de> | 2023-11-16 00:54:30 +0100 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2023-11-17 16:27:52 +0000 |
commit | 1952d13a414229f1867a8a9c00fc07df07d7042c (patch) | |
tree | a3528d580f78b7b856dde5e8d9ca980fa1d6d07f /src/include/device/pci_ids.h | |
parent | 0010b89c67354dd4dda1417e6fc990cc3b82f0d4 (diff) |
nb/amd/pi/00730F01: restructure chip ops
Since this chip is a SoC and also to bring the chipset devicetree more
in line with the chipset devicetree of Sandy Bridge, merge the chip
operations of the northbridge's root complex and the northbridge itself
into one chip operations structure and use it at the top level of the
devicetree.
TEST=PC Engines APU2 still boots and doesn't show any new problems
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I8b42bac07b1409bbc797bc4428cf9f84a40e94c2
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79084
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Diffstat (limited to 'src/include/device/pci_ids.h')
0 files changed, 0 insertions, 0 deletions