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authorEric Biederman <ebiederm@xmission.com>2004-10-14 21:10:23 +0000
committerEric Biederman <ebiederm@xmission.com>2004-10-14 21:10:23 +0000
commit992cd008f1d4217c3e7dd6d0a1e8445ade5da63d (patch)
tree277eebe8ff539afd4a5953ecd9542e3e0b224719 /src/include/device/pci_def.h
parentb78c1972feed4c57eebba8f94de86a91e32c3fa7 (diff)
- Update the device header files
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1663 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/include/device/pci_def.h')
-rw-r--r--src/include/device/pci_def.h12
1 files changed, 6 insertions, 6 deletions
diff --git a/src/include/device/pci_def.h b/src/include/device/pci_def.h
index 46229a12f4..dc2176babb 100644
--- a/src/include/device/pci_def.h
+++ b/src/include/device/pci_def.h
@@ -68,13 +68,13 @@
#define PCI_BASE_ADDRESS_SPACE 0x01 /* 0 = memory, 1 = I/O */
#define PCI_BASE_ADDRESS_SPACE_IO 0x01
#define PCI_BASE_ADDRESS_SPACE_MEMORY 0x00
-#define PCI_BASE_ADDRESS_MEM_TYPE_MASK 0x06
-#define PCI_BASE_ADDRESS_MEM_TYPE_32 0x00 /* 32 bit address */
-#define PCI_BASE_ADDRESS_MEM_TYPE_1M 0x02 /* Below 1M [obsolete] */
-#define PCI_BASE_ADDRESS_MEM_TYPE_64 0x04 /* 64 bit address */
+#define PCI_BASE_ADDRESS_MEM_LIMIT_MASK 0x06
+#define PCI_BASE_ADDRESS_MEM_LIMIT_32 0x00 /* 32 bit address */
+#define PCI_BASE_ADDRESS_MEM_LIMIT_1M 0x02 /* Below 1M [obsolete] */
+#define PCI_BASE_ADDRESS_MEM_LIMIT_64 0x04 /* 64 bit address */
#define PCI_BASE_ADDRESS_MEM_PREFETCH 0x08 /* prefetchable? */
-#define PCI_BASE_ADDRESS_MEM_MASK (~0x0fUL)
-#define PCI_BASE_ADDRESS_IO_MASK (~0x03UL)
+#define PCI_BASE_ADDRESS_MEM_ATTR_MASK 0x0f
+#define PCI_BASE_ADDRESS_IO_ATTR_MASK 0x03
/* bit 1 is reserved if address_space = 1 */
/* Header type 0 (normal devices) */