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authorFelix Held <felix-coreboot@felixheld.de>2024-01-11 22:26:18 +0100
committerFelix Held <felix-coreboot@felixheld.de>2024-01-16 22:59:55 +0000
commit3b5b66d82954e026a91a1eff833fa7f652fed629 (patch)
treec7ff2cb87807e204d6f9e04e1cae14516eae0801 /src/include/device/pci_def.h
parent090ea7ab8fceae54488620160aa95da4292d663f (diff)
device: Add support for multiple PCI segment groups
Add initial support for multiple PCI segment groups. Instead of modifying secondary in the bus struct introduce a new segment_group struct element and keep existing common code. Since all platforms currently only use 1 segment this is not a functional change. On platforms that support more than 1 segment the segment has to be set when creating the PCI domain. Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Ied3313c41896362dd989ee2ab1b1bcdced840aa8 Reviewed-on: https://review.coreboot.org/c/coreboot/+/79927 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
Diffstat (limited to 'src/include/device/pci_def.h')
-rw-r--r--src/include/device/pci_def.h13
1 files changed, 13 insertions, 0 deletions
diff --git a/src/include/device/pci_def.h b/src/include/device/pci_def.h
index 8b90163a1e..6d61e6d2bd 100644
--- a/src/include/device/pci_def.h
+++ b/src/include/device/pci_def.h
@@ -591,9 +591,22 @@
#define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f)
#define PCI_FUNC(devfn) ((devfn) & 0x07)
+/*
+ * CONFIG_ECAM_MMCONF_BUS_NUMBER is a power of 2. For values <= 256,
+ * PCI_BUSES_PER_SEGMENT_GROUP is CONFIG_ECAM_MMCONF_BUS_NUMBER and PCI_SEGMENT_GROUP_COUNT
+ * is 1. For values > 256, PCI_BUSES_PER_SEGMENT_GROUP is 256 and PCI_SEGMENT_GROUP_COUNT is
+ * CONFIG_ECAM_MMCONF_BUS_NUMBER / 256.
+*/
+#define PCI_BUS_NUMBER_MASK 0xff
+#define PCI_SEGMENT_GROUP_COUNT (((CONFIG_ECAM_MMCONF_BUS_NUMBER - 1) >> 8) + 1)
+#define PCI_BUSES_PER_SEGMENT_GROUP (((CONFIG_ECAM_MMCONF_BUS_NUMBER - 1) & PCI_BUS_NUMBER_MASK) + 1)
+#define PCI_PER_SEGMENT_GROUP_ECAM_SIZE (256 * MiB)
+
/* Translation from PCI_DEV() to devicetree bus and path.pci.devfn. */
#define PCI_DEV2DEVFN(sdev) (((sdev)>>12) & 0xff)
#define PCI_DEV2SEGBUS(sdev) (((sdev)>>20) & 0xfff)
+#define PCI_DEV2BUS(sdev) (((sdev)>>20) & PCI_BUS_NUMBER_MASK)
+#define PCI_DEV2SEG(sdev) (((sdev)>>28) & 0xf)
/* Fields from within the device's class value. */
#define PCI_CLASS_GET_DEVICE(c) (c >> 8)