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authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-03-07 14:18:28 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-03-16 15:19:33 +0000
commit4663f45caa2352760ee08ec28b9c2d6e2e8823f9 (patch)
treecde34a0beabcd41ffbda765e7f9dd3d036bbe5cd /src/include/device/pci.h
parent34cf5619f929775efd819468ba6036e637cfbd85 (diff)
device/pci_ops: Have only default PCI bus ops available
In the current state of the tree we do not utilise the mechanism of having per-device overrides for PCI bus ops. This change effectively inlines all PCI config accessors for ramstage as well. Change-Id: I11c37cadfcbef8fb5657dec6d620e6bccab311a4 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31753 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/include/device/pci.h')
-rw-r--r--src/include/device/pci.h14
1 files changed, 1 insertions, 13 deletions
diff --git a/src/include/device/pci.h b/src/include/device/pci.h
index 14c4693459..f1de7bffa2 100644
--- a/src/include/device/pci.h
+++ b/src/include/device/pci.h
@@ -22,6 +22,7 @@
#include <device/pci_def.h>
#include <device/resource.h>
#include <device/device.h>
+#include <device/pci_ops.h>
#include <device/pci_rom.h>
#include <device/pci_type.h>
@@ -33,19 +34,6 @@ struct pci_operations {
void (*set_L1_ss_latency)(struct device *dev, unsigned int off);
};
-/* Common pci bus operations */
-struct pci_bus_operations {
- uint8_t (*read8)(pci_devfn_t dev, uint16_t reg);
- uint16_t (*read16)(pci_devfn_t dev, uint16_t reg);
- uint32_t (*read32)(pci_devfn_t dev, uint16_t reg);
- void (*write8)(pci_devfn_t dev, uint16_t reg, uint8_t val);
- void (*write16)(pci_devfn_t dev, uint16_t reg, uint16_t val);
- void (*write32)(pci_devfn_t dev, uint16_t reg, uint32_t val);
-};
-
-// FIXME: Needs complete pci_bus_operations
-#include <device/pci_ops.h>
-
struct pci_driver {
const struct device_operations *ops;
unsigned short vendor;