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authorFurquan Shaikh <furquan@google.com>2021-10-25 15:47:39 -0700
committerFurquan Shaikh <furquan@google.com>2021-10-26 23:22:00 +0000
commitd06c09179a277a22ee3c14afe0e8f0c51ea74277 (patch)
tree2d528191919efe5761bc101ded20f3da8bf7be5d /src/include/device/azalia.h
parent10796d8c1e446d677c563280f9d7ca1905218041 (diff)
intel/adlrvp: Add sub-regions to SI_ME in chromeos.fmd
This change adds sub-regions to SI_ME in chromeos.fmd. These are required to support stitching of CSE components. BUG=b:189177538 Change-Id: Ife48aafcec43555175aad44f8b6307beeaea9184 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/58592 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/include/device/azalia.h')
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