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authorCurtis Chen <curtis.chen@intel.com>2021-11-25 13:17:42 +0800
committerFelix Held <felix-coreboot@felixheld.de>2021-12-03 15:37:44 +0000
commitea1bb5f7de084ee812a3094fd1a4876c91ef70e6 (patch)
tree5d699a9e34b5c2d57c3c092d052bf8af648f6919 /src/include/cpu
parente0869c3e499939243b98d54bcdb8a29df6cf0094 (diff)
soc/intel/alderlake: Add TDP to give correct VR configuration
The VR configuration should be based on the different Soc SKU type. And we also have different SKU in the same SA PCI ID. Therefore, add TDP to recognize the correct SKU and give the correct power setting. BUG=b:202486131 TEST=Build and check fsp log to confirm the settings are set properly. Signed-off-by: Curtis Chen <curtis.chen@intel.com> Change-Id: I4d31e7afc76d9a8c772781671f92ec08f9d8713f Reviewed-on: https://review.coreboot.org/c/coreboot/+/59644 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/include/cpu')
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