diff options
author | Aaron Durbin <adurbin@chromium.org> | 2019-12-18 15:44:40 +0000 |
---|---|---|
committer | Matt DeVillier <matt.devillier@gmail.com> | 2019-12-18 18:16:03 +0000 |
commit | 6dc2fda469954b53263cfd98f501b8a73985b68f (patch) | |
tree | b2a50e7d29d629d5f1f3cf3195087e42daaff38f /src/include/cpu | |
parent | 1a8dbfc89991d05362933f0cd8c9a2e53b389412 (diff) |
Revert "include/cpu/x86: Add STM Support"
This reverts commit 297b6b862a724de70abf33f681f63b6a3d84c24b.
Reason for revert: breaks smm. No code is using these fields. Original patch incomplete.
Change-Id: I6acf15dc9d77ed8a83b98f086f2a0b306c584a9b
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37096
Reviewed-by: ron minnich <rminnich@gmail.com>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/include/cpu')
-rw-r--r-- | src/include/cpu/x86/msr.h | 6 | ||||
-rw-r--r-- | src/include/cpu/x86/smm.h | 3 |
2 files changed, 0 insertions, 9 deletions
diff --git a/src/include/cpu/x86/msr.h b/src/include/cpu/x86/msr.h index 0da8b564fa..2710e7f1fc 100644 --- a/src/include/cpu/x86/msr.h +++ b/src/include/cpu/x86/msr.h @@ -30,10 +30,6 @@ #define IA32_BIOS_SIGN_ID 0x8b #define IA32_MPERF 0xe7 #define IA32_APERF 0xe8 -/* STM */ -#define IA32_SMM_MONITOR_CTL_MSR 0x9B -#define SMBASE_RO_MSR 0x98 -#define IA32_SMM_MONITOR_VALID (1<<0) #define IA32_MCG_CAP 0x179 #define MCG_CTL_P (1 << 3) #define MCA_BANKS_MASK 0xff @@ -52,8 +48,6 @@ #define IA32_PAT 0x277 #define IA32_MC0_CTL 0x400 #define IA32_MC0_STATUS 0x401 -#define IA32_VMX_BASIC_MSR 0x480 -#define IA32_VMX_MISC_MSR 0x485 #define MCA_STATUS_HI_VAL (1UL << (63 - 32)) #define MCA_STATUS_HI_OVERFLOW (1UL << (62 - 32)) #define MCA_STATUS_HI_UC (1UL << (61 - 32)) diff --git a/src/include/cpu/x86/smm.h b/src/include/cpu/x86/smm.h index 9efe2e04eb..cf107b121a 100644 --- a/src/include/cpu/x86/smm.h +++ b/src/include/cpu/x86/smm.h @@ -64,9 +64,6 @@ extern unsigned char _binary_smm_end[]; struct smm_runtime { u32 smbase; u32 save_state_size; - u32 num_cpus; - /* STM's 32bit entry into SMI handler */ - u32 start32_offset; /* The apic_id_to_cpu provides a mapping from APIC id to CPU number. * The CPU number is indicated by the index into the array by matching * the default APIC id and value at the index. The stub loader |