diff options
author | Siyuan Wang <wangsiyuanbuaa@gmail.com> | 2013-07-09 17:08:41 +0800 |
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committer | Bruce Griffith <Bruce.Griffith@se-eng.com> | 2013-08-05 18:21:29 +0200 |
commit | 5d7d09c4abfd60bebb7f17df3dce105fc22e9b92 (patch) | |
tree | 75ddde07df0d174558157db21bbbc4156f1731f7 /src/include/cpu | |
parent | affe85fbc8a13d35960aa92ae87cbb6330ad253f (diff) |
AMD Kabini: Add CPU AGESA wrapper for new AMD processor family
Change-Id: I4a1d2118aeb2895f3c2acea5e792fbd69c855156
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
Signed-off-by: Bruce Griffith <Bruce.Griffith@se-eng.com>
Reviewed-by: Mike Loptien <mike.loptien@se-eng.com>
Tested-by: Bruce Griffith <bruce.griffith@se-eng.com>
Reviewed-on: http://review.coreboot.org/3781
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martin.roth@se-eng.com>
Diffstat (limited to 'src/include/cpu')
-rw-r--r-- | src/include/cpu/amd/amdfam16.h | 47 |
1 files changed, 47 insertions, 0 deletions
diff --git a/src/include/cpu/amd/amdfam16.h b/src/include/cpu/amd/amdfam16.h new file mode 100644 index 0000000000..7097372400 --- /dev/null +++ b/src/include/cpu/amd/amdfam16.h @@ -0,0 +1,47 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2012 Advanced Micro Devices, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef CPU_AMD_FAM16_H +#define CPU_AMD_FAM16_H + +#include <cpu/x86/msr.h> + +#define MCI_STATUS 0x00000401 +#define HWCR_MSR 0xC0010015 +#define NB_CFG_MSR 0xC001001f + +#define LS_CFG_MSR 0xC0011020 +#define IC_CFG_MSR 0xC0011021 +#define DC_CFG_MSR 0xC0011022 +#define CU_CFG_MSR 0xC0011023 +#define CU_CFG2_MSR 0xC001102A + +#define CPU_ID_FEATURES_MSR 0xC0011004 +#define CPU_ID_EXT_FEATURES_MSR 0xC0011005 + +#if defined(__PRE_RAM__) +void wait_all_core0_started(void); +void wait_all_other_cores_started(u32 bsp_apicid); +void wait_all_aps_started(u32 bsp_apicid); +void allow_all_aps_stop(u32 bsp_apicid); +#endif +u32 get_initial_apicid(void); +void get_bus_conf(void); + +#endif /* CPU_AMD_FAM16_H */ |