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authorLean Sheng Tan <sheng.tan@9elements.com>2022-04-01 18:36:11 +0200
committerAngel Pons <th3fanbus@gmail.com>2022-04-04 17:49:17 +0000
commit311ddf3b81b276553fb3a1973343b5ca31f85dbe (patch)
treef87f5453c6b0fb58c614cbb0e249b7cb78ebc436 /src/include/cpu
parent9e78dd13577b577f96699710fefd965acda686e1 (diff)
soc/intel/alderlake: Add new CPU ID
Add new CPU ID 0x906A3 (L0 stepping). Signed-off-by: Lean Sheng Tan <sheng.tan@9elements.com> Change-Id: I280da46e5fdd3792df50556e2804b3bcb346eee3 Reviewed-on: https://review.coreboot.org/c/coreboot/+/63302 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/include/cpu')
-rw-r--r--src/include/cpu/intel/cpu_ids.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/include/cpu/intel/cpu_ids.h b/src/include/cpu/intel/cpu_ids.h
index f0c1baf319..6d3685194f 100644
--- a/src/include/cpu/intel/cpu_ids.h
+++ b/src/include/cpu/intel/cpu_ids.h
@@ -54,6 +54,7 @@
#define CPUID_ALDERLAKE_J0 0x906a0
#define CPUID_ALDERLAKE_Q0 0x906a1
#define CPUID_ALDERLAKE_K0 0x906a2
+#define CPUID_ALDERLAKE_L0 0x906a3
#define CPUID_ALDERLAKE_R0 0x906a4
#define CPUID_ALDERLAKE_N_A0 0xb06e0
#define CPUID_METEORLAKE_A0_1 0xa06a0