diff options
| author | Frank Vibrans <frank.vibrans@amd.com> | 2011-02-14 18:56:10 +0000 |
|---|---|---|
| committer | Marc Jones <marc.jones@amd.com> | 2011-02-14 18:56:10 +0000 |
| commit | 6b4674e28978b1573d994b47f985ea98ad33a14b (patch) | |
| tree | e0889d79125559de2dbb65aeee6933181e8c0bf1 /src/include/cpu | |
| parent | d0a8ebf053375e10822acf043e2b01048663d371 (diff) | |
I missed a file that was part of the AMD AGESA CPU wrapper checkin, r6347.
Signed-off-by: Frank Vibrans <frank.vibrans@amd.com>
Acked-by: Marc Jones <marcj303@gmail.com
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6350 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/include/cpu')
| -rw-r--r-- | src/include/cpu/amd/amdfam14.h | 53 |
1 files changed, 53 insertions, 0 deletions
diff --git a/src/include/cpu/amd/amdfam14.h b/src/include/cpu/amd/amdfam14.h new file mode 100644 index 0000000000..1587d16cf5 --- /dev/null +++ b/src/include/cpu/amd/amdfam14.h @@ -0,0 +1,53 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2011 Advanced Micro Devices, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef CPU_AMD_FAM14_H +#define CPU_AMD_FAM14_H + +#include <cpu/x86/msr.h> + +#define HWCR_MSR 0xC0010015 +#define NB_CFG_MSR 0xC001001f +#define LS_CFG_MSR 0xC0011020 +#define IC_CFG_MSR 0xC0011021 +#define DC_CFG_MSR 0xC0011022 +#define BU_CFG_MSR 0xC0011023 +#define BU_CFG2_MSR 0xC001102A + +#define CPU_ID_FEATURES_MSR 0xC0011004 +#define CPU_ID_EXT_FEATURES_MSR 0xC0011005 + +msr_t rdmsr_amd(u32 index); +void wrmsr_amd(u32 index, msr_t msr); + +//#if defined(__GNUC__) +//// it can be used to get unitid and coreid it running only +//struct node_core_id get_node_core_id(u32 nb_cfg_54); +//struct node_core_id get_node_core_id_x(void); +//#endif + +#if defined(__PRE_RAM__) +void wait_all_core0_started(void); +void wait_all_other_cores_started(u32 bsp_apicid); +void wait_all_aps_started(u32 bsp_apicid); +void allow_all_aps_stop(u32 bsp_apicid); +#endif +u32 get_initial_apicid(void); + +#endif /* CPU_AMD_FAM14_H */ |